summaryrefslogtreecommitdiffstats
path: root/src/soc/mediatek/mt8188
diff options
context:
space:
mode:
authorYidi Lin <yidilin@chromium.org>2023-03-28 10:47:27 +0800
committerRex-BC Chen <rex-bc.chen@mediatek.com>2023-04-10 01:54:49 +0000
commit9fbdb2b19295380e0f222e62c12f1b2a2b58540d (patch)
treed0d0d22b66918e21c34aa8a5eddf0951c7ef7d21 /src/soc/mediatek/mt8188
parent47a9797100d65f2b23b81d9893302abd92994abd (diff)
downloadcoreboot-9fbdb2b19295380e0f222e62c12f1b2a2b58540d.tar.gz
coreboot-9fbdb2b19295380e0f222e62c12f1b2a2b58540d.tar.bz2
coreboot-9fbdb2b19295380e0f222e62c12f1b2a2b58540d.zip
soc/mediatek/mt8188: Reduce lastbus configuration size by 1280 bytes
Original lastbus configuration consumes constant memory size by allocating 16 and 8 members arrays and the utilization is bad. Refactor the lastbus structs to save memory usage. BRANCH=none BUG=none TEST=bootblock.raw.bin size is reduced from 60328 bytes to 59048 bytes. Change-Id: I07ff9ff7c75f03219e1792b92b62814293ef43fe Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74061 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8188')
-rw-r--r--src/soc/mediatek/mt8188/lastbus.c142
1 files changed, 75 insertions, 67 deletions
diff --git a/src/soc/mediatek/mt8188/lastbus.c b/src/soc/mediatek/mt8188/lastbus.c
index f2c0b0d57fe2..5d117af03b7d 100644
--- a/src/soc/mediatek/mt8188/lastbus.c
+++ b/src/soc/mediatek/mt8188/lastbus.c
@@ -5,75 +5,83 @@
#include <soc/addressmap.h>
#include <soc/lastbus_v2.h>
+static const struct lastbus_idle_mask infra_ao_mask[] = {
+ {
+ .reg_offset = 0x04,
+ .reg_value = 0x2,
+ },
+ {
+ .reg_offset = 0x08,
+ .reg_value = 0x10000,
+ },
+};
+
+static const struct lastbus_idle_mask peri_ao_mask[] = {
+ {
+ .reg_offset = 0x04,
+ .reg_value = 0x20000,
+ },
+};
+
+static const struct lastbus_idle_mask fmem_ao_mask[] = {
+ {
+ .reg_offset = 0x14,
+ .reg_value = 0x204,
+ },
+};
+
+static const struct lastbus_monitor monitors[] = {
+ {
+ .name = "debug_ctrl_ao_INFRA_AO",
+ .base = INFRA_AO_DBUG_BASE,
+ .num_ports = 34,
+ .num_idle_mask = ARRAY_SIZE(infra_ao_mask),
+ .idle_masks = infra_ao_mask,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_INFRA2_AO",
+ .base = INFRA2_AO_DBUG_BASE,
+ .num_ports = 9,
+ .num_idle_mask = 0,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_PERI_AO",
+ .base = PERI_AO_BASE,
+ .num_ports = 25,
+ .num_idle_mask = ARRAY_SIZE(peri_ao_mask),
+ .idle_masks = peri_ao_mask,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_PERI_AO2",
+ .base = PERI_AO2_BASE,
+ .num_ports = 20,
+ .num_idle_mask = 0,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_PERI_PAR_AO",
+ .base = PERI_PAR_AO_BASE,
+ .num_ports = 18,
+ .num_idle_mask = 0,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_FMEM_AO",
+ .base = FMEM_AO_BASE,
+ .num_ports = 28,
+ .num_idle_mask = ARRAY_SIZE(fmem_ao_mask),
+ .idle_masks = fmem_ao_mask,
+ .bus_freq_mhz = 78,
+ },
+};
+
const struct lastbus_config lastbus_cfg = {
.latch_platform = "MT8188",
.timeout_ms = 200,
.timeout_type = 0,
- .num_used_monitors = 6,
- .monitors = {
- {
- .name = "debug_ctrl_ao_INFRA_AO",
- .base = INFRA_AO_DBUG_BASE,
- .num_ports = 34,
- .num_idle_mask = 2,
- .idle_masks = {
- {
- .reg_offset = 0x04,
- .reg_value = 0x2,
- },
- {
- .reg_offset = 0x08,
- .reg_value = 0x10000,
- },
- },
- .bus_freq_mhz = 78,
- },
- {
- .name = "debug_ctrl_ao_INFRA2_AO",
- .base = INFRA2_AO_DBUG_BASE,
- .num_ports = 9,
- .num_idle_mask = 0,
- .bus_freq_mhz = 78,
- },
- {
- .name = "debug_ctrl_ao_PERI_AO",
- .base = PERI_AO_BASE,
- .num_ports = 25,
- .num_idle_mask = 1,
- .idle_masks = {
- {
- .reg_offset = 0x04,
- .reg_value = 0x20000,
- },
- },
- .bus_freq_mhz = 78,
- },
- {
- .name = "debug_ctrl_ao_PERI_AO2",
- .base = PERI_AO2_BASE,
- .num_ports = 20,
- .num_idle_mask = 0,
- .bus_freq_mhz = 78,
- },
- {
- .name = "debug_ctrl_ao_PERI_PAR_AO",
- .base = PERI_PAR_AO_BASE,
- .num_ports = 18,
- .num_idle_mask = 0,
- .bus_freq_mhz = 78,
- },
- {
- .name = "debug_ctrl_ao_FMEM_AO",
- .base = FMEM_AO_BASE,
- .num_ports = 28,
- .num_idle_mask = 1,
- .idle_masks = {
- {
- .reg_offset = 0x14,
- .reg_value = 0x204,
- },
- },
- .bus_freq_mhz = 78,
- },
- },
+ .num_used_monitors = ARRAY_SIZE(monitors),
+ .monitors = monitors,
};