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| author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2021-07-12 15:01:11 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-06 14:43:02 +0000 |
| commit | eef442d0c1d4bab616aaa077d80a56c64cac6f1e (patch) | |
| tree | 54a92fa860db870ad2fed22ea2006579799cf672 /src/soc/mediatek/mt8192/Kconfig | |
| parent | 59c9327cbd7af6aace8587f71f47d25396b57b7b (diff) | |
| download | coreboot-eef442d0c1d4bab616aaa077d80a56c64cac6f1e.tar.gz coreboot-eef442d0c1d4bab616aaa077d80a56c64cac6f1e.tar.bz2 coreboot-eef442d0c1d4bab616aaa077d80a56c64cac6f1e.zip | |
soc/mediatek/mt8192: initialize DFD
DFD (Design for Debug) is a debugging tool, which scans
flip-flops and dumps to internal RAM on the WDT reset.
After system reboots, those values could be showed for
debugging.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I39a4391c1d1e832d77b709f8f899bb1c6dcacd69
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8192/Kconfig')
| -rw-r--r-- | src/soc/mediatek/mt8192/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig index eb4aab65fee8..21dcc7c4782b 100644 --- a/src/soc/mediatek/mt8192/Kconfig +++ b/src/soc/mediatek/mt8192/Kconfig @@ -63,4 +63,10 @@ config SRCLKEN_RC_SUPPORT This option enables clock buffer remote controller module to control PMIC 26MHz clock output. +config MTK_DFD + bool + default n + help + This option enables DFD (Design for Debug) settings. + endif |