soc/mediatek/mt8192: Add mtcmos init support

Using common mtcmos code to power on audio and display modules in SOC.

TEST=Boots correctly on MT8192EVB. Passes the status check at the end of
     mtcmos_power_on()

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Change-Id: Ie7bff831eecfc2b4d315a577f6ff86befc483eab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45394
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 35 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8192/mtcmos.c b/src/soc/mediatek/mt8192/mtcmos.c
new file mode 100644
index 000000000000..5a3b1fb189f9
--- /dev/null
+++ b/src/soc/mediatek/mt8192/mtcmos.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/infracfg.h>
+#include <soc/mtcmos.h>
+
+enum {
+	DISP_PROT_STEP1_0_MASK	= 0x05015405,
+	DISP_PROT_STEP1_1_MASK	= 0x00001100,
+	DISP_PROT_STEP2_0_MASK	= 0x00800040,
+	DISP_PROT_STEP2_1_MASK	= 0x0a02800a,
+	DISP_PROT_STEP2_2_MASK	= 0x00002200,
+
+	AUDIO_PROT_STEP1_0_MASK	= 0x00000010,
+};
+
+void mtcmos_protect_display_bus(void)
+{
+	write32(&mt8192_infracfg->infra_topaxi_protecten_clr,
+		DISP_PROT_STEP2_0_MASK);
+	write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr,
+		DISP_PROT_STEP2_1_MASK);
+	write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr_2,
+		DISP_PROT_STEP2_2_MASK);
+	write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr,
+		DISP_PROT_STEP1_0_MASK);
+	write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr_2,
+		DISP_PROT_STEP1_1_MASK);
+}
+
+void mtcmos_protect_audio_bus(void)
+{
+	write32(&mt8192_infracfg->infra_topaxi_protecten_clr_2,
+		AUDIO_PROT_STEP1_0_MASK);
+}