summaryrefslogtreecommitdiffstats
path: root/src/soc/mediatek/mt8192
diff options
context:
space:
mode:
authorMartin Roth <martin@coreboot.org>2021-10-01 14:53:22 -0600
committerMartin Roth <martinroth@google.com>2021-10-05 18:07:08 +0000
commit26f97f9532933da3c1d72a7918c8a24457bbc1c0 (patch)
tree8c25279e58ef541fae197ec193f5642a9b21b2d4 /src/soc/mediatek/mt8192
parent50863daef8ed75c0cb3dfd375e7622c898de5821 (diff)
downloadcoreboot-26f97f9532933da3c1d72a7918c8a24457bbc1c0.tar.gz
coreboot-26f97f9532933da3c1d72a7918c8a24457bbc1c0.tar.bz2
coreboot-26f97f9532933da3c1d72a7918c8a24457bbc1c0.zip
src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192')
-rw-r--r--src/soc/mediatek/mt8192/pll.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8192/pll.c b/src/soc/mediatek/mt8192/pll.c
index f0a9509173fc..e49e222c7ce4 100644
--- a/src/soc/mediatek/mt8192/pll.c
+++ b/src/soc/mediatek/mt8192/pll.c
@@ -524,7 +524,7 @@ u32 mt_fmeter_get_freq_khz(enum fmeter_type type, u32 id)
SET32_BITFIELDS(&mtk_topckgen->clk_misc_cfg_0,
CLK_MISC_CFG_0_METER_DIV, 0);
} else {
- die("unsupport fmeter type\n");
+ die("unsupported fmeter type\n");
}
/* enable frequency meter */