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author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-05-26 10:50:42 +0800 |
---|---|---|
committer | Martin L Roth <gaumless@tutanota.com> | 2022-05-28 04:27:19 +0000 |
commit | 3c6b3040846a66f81615159c21e61208d90b3992 (patch) | |
tree | ff922aede08eda8827a7ea2d5cb0f2aea381ae2c /src/soc/mediatek/mt8192 | |
parent | ba638c49c9ca7d96f63980cfce41d5482d055183 (diff) | |
download | coreboot-3c6b3040846a66f81615159c21e61208d90b3992.tar.gz coreboot-3c6b3040846a66f81615159c21e61208d90b3992.tar.bz2 coreboot-3c6b3040846a66f81615159c21e61208d90b3992.zip |
soc/mediatek/mt8192: Enable thermal hardware reset
Under the current watchdog setting, the system will not reboot when the
temperature is too high. To enable thermal hardware reset, we need to
enable thermal control request and set it to reboot mode.
Note that because thermal throttle (by lowering cpu frequency) is
currently enabled, the thermal hardware reset shouldn't be triggered
under normal circumstances.
This feature is only for new hardware structure for thermal. Therefore,
we only need to apply it on MT8192/MT8195/MT8186.
This setting is based on thermal and watchdog section of MT8192
Function Specification.
BUG=none
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I98b062c2070384527624c3bcf0dfded25a2c8ce4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64676
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192')
-rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/mediatek/mt8192/wdt.c | 23 |
2 files changed, 24 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index aeb50a729b5b..ac55a2f9de4e 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -12,7 +12,7 @@ bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c bootblock-y += ../common/timer.c bootblock-y += ../common/tracker.c ../common/tracker_v2.c bootblock-y += ../common/uart.c -bootblock-y += ../common/wdt.c +bootblock-y += ../common/wdt.c wdt.c verstage-y += ../common/auxadc.c verstage-y += ../common/flash_controller.c diff --git a/src/soc/mediatek/mt8192/wdt.c b/src/soc/mediatek/mt8192/wdt.c new file mode 100644 index 000000000000..8c8959a4202d --- /dev/null +++ b/src/soc/mediatek/mt8192/wdt.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <soc/addressmap.h> +#include <soc/wdt.h> + +#define MTK_WDT_REQ_MOD_KEY_VAL 0x33 +#define MTK_WDT_REQ_IRQ_KEY_VAL 0x44 + +DEFINE_BITFIELD(MTK_WDT_REQ_MOD_KEY, 31, 24) +DEFINE_BITFIELD(MTK_WDT_REQ_IRQ_KEY, 31, 24) +DEFINE_BIT(MTK_WDT_THERMAL_EN, 18) +DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18) + +void mtk_wdt_preinit(void) +{ + SET32_BITFIELDS(&mtk_wdt->wdt_req_mode, + MTK_WDT_THERMAL_EN, 1, + MTK_WDT_REQ_MOD_KEY, MTK_WDT_REQ_MOD_KEY_VAL); + SET32_BITFIELDS(&mtk_wdt->wdt_req_irq_en, + MTK_WDT_THERMAL_IRQ, 0, + MTK_WDT_REQ_IRQ_KEY, MTK_WDT_REQ_IRQ_KEY_VAL); +} |