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| author | Yu-Ping Wu <yupingso@chromium.org> | 2021-01-13 10:29:18 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-03-24 05:43:50 +0000 |
| commit | 71c5ca764f6bbf85f61c92e6ac171f8bd4f126d3 (patch) | |
| tree | 44ce80026673ef3abc599bee080f2e22ef1fca92 /src/soc/mediatek/mt8192 | |
| parent | 25ef410423df812f626b77b695f151b6f221fa2e (diff) | |
| download | coreboot-71c5ca764f6bbf85f61c92e6ac171f8bd4f126d3.tar.gz coreboot-71c5ca764f6bbf85f61c92e6ac171f8bd4f126d3.tar.bz2 coreboot-71c5ca764f6bbf85f61c92e6ac171f8bd4f126d3.zip | |
soc/mediatek: Use MRC cache API for asurada
Use the MRC cache API for asurada, and sync dramc_param.h with dram
blob (CL:*3674585). With this change, the checksum, originally stored in
flash, is replaced with a hash in TPM. In addition, in recovery boot,
full calibration will always ne performed, and the cached calibration
data will be cleared from flash.
This change increases ROMSTAGE size from 236K to 264K. Most of the
increase is caused by TPM-related functions.
Add new API mtk_dram_init() to emi.h, so that 'dramc_parameter' can be
moved to soc folder.
With this CL, there is no significant change in boot time. Normal AP
reboot time (fast calibration) is consistently 0.98s as before, so
this change should not affect the result of platform_BootPerf.
BUG=b:170687062
TEST=emerge-asurada coreboot
TEST=Hayato boots with both full and fast calibration
BRANCH=none
Cq-Depend: chrome-internal:3674585, chrome-internal:3704751
Change-Id: Ief942048ce530433a57e8205d3a68ad56235b427
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8192')
| -rw-r--r-- | src/soc/mediatek/mt8192/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig index aa4fb01e9e20..eb4aab65fee8 100644 --- a/src/soc/mediatek/mt8192/Kconfig +++ b/src/soc/mediatek/mt8192/Kconfig @@ -6,6 +6,7 @@ config SOC_MEDIATEK_MT8192 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_RAMSTAGE_ARMV8_64 select ARM64_USE_ARM_TRUSTED_FIRMWARE + select CACHE_MRC_SETTINGS select HAVE_DEBUG_RAM_SETUP select HAVE_UART_SPECIAL select SOC_MEDIATEK_COMMON |