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author | Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> | 2021-01-12 21:29:48 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-01-20 14:00:09 +0000 |
commit | 8572e33e5c44b14a184c9e0024df283595077386 (patch) | |
tree | f5beff6a902364dc479f1d75022895dc4cf507d5 /src/soc/mediatek/mt8192 | |
parent | 92e4ed170232dd6e460be996772f07a26e620677 (diff) | |
download | coreboot-8572e33e5c44b14a184c9e0024df283595077386.tar.gz coreboot-8572e33e5c44b14a184c9e0024df283595077386.tar.bz2 coreboot-8572e33e5c44b14a184c9e0024df283595077386.zip |
soc/mediatek/mt8192: pmic: add scp voltage initialization
Add scp voltage initialization.
BUG=none
BRANCH=none
TEST=boot asurada correctly
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: I68302715ae804fed11bb54f4dfc4e90cde5224df
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8192')
-rw-r--r-- | src/soc/mediatek/mt8192/mt6359p.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/mt6359p.c b/src/soc/mediatek/mt8192/mt6359p.c index facf70b37d94..df8eb39e7665 100644 --- a/src/soc/mediatek/mt8192/mt6359p.c +++ b/src/soc/mediatek/mt8192/mt6359p.c @@ -170,6 +170,13 @@ static const struct pmic_setting init_setting[] = { {0x202C, 0x8, 0xC, 0}, {0x208C, 0x100, 0xF00, 0}, {0x209C, 0x80, 0x1E0, 0}, + /* + * BUCK_VGPU11_OP_MODE/CFG/EN + * Vreq setting for scp usage + */ + {0x15a0, 0x0, 0x1, 11}, + {0x159a, 0x0, 0x1, 11}, + {0x1594, 0x1, 0x1, 11}, }; static const struct pmic_setting lp_setting[] = { |