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| author | Bo-Chen Chen <rex-bc.chen@mediatek.com> | 2022-11-24 17:19:42 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-05 14:25:37 +0000 |
| commit | bb4c9ca2d68aa83d57c2d2839bbc81b6b2f23e1c (patch) | |
| tree | ccdab1b0f32a512da51d67c95884c15d72b836cd /src/soc/mediatek/mt8192 | |
| parent | b1e7adeca160066052047462cb1f936cf68d873e (diff) | |
| download | coreboot-bb4c9ca2d68aa83d57c2d2839bbc81b6b2f23e1c.tar.gz coreboot-bb4c9ca2d68aa83d57c2d2839bbc81b6b2f23e1c.tar.bz2 coreboot-bb4c9ca2d68aa83d57c2d2839bbc81b6b2f23e1c.zip | |
soc/mediatek: Fix DSI register definition for MT8186
The DSI CMDQ offset of MT8186 is different from previous SoCs.
Therefore, we define two versions for DSI register header files. The v1
is for MT8173/MT8183/MT8192 and the v2 is for MT8186/MT8188.
BUG=b:244208960
TEST=build pass
BRANCH=corsola
Change-Id: I3d13ca03b72554ab7be2b194db32a4f961f38dad
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70183
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192')
| -rw-r--r-- | src/soc/mediatek/mt8192/include/soc/dsi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/include/soc/dsi.h b/src/soc/mediatek/mt8192/include/soc/dsi.h index ed3d0d8939b6..9ce55faba608 100644 --- a/src/soc/mediatek/mt8192/include/soc/dsi.h +++ b/src/soc/mediatek/mt8192/include/soc/dsi.h @@ -4,6 +4,7 @@ #define SOC_MEDIATEK_MT8192_DSI_H #include <soc/dsi_common.h> +#include <soc/dsi_register_v1.h> /* DSI features */ #define MTK_DSI_MIPI_RATIO_NUMERATOR 100 |