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| author | Jianjun Wang <jianjun.wang@mediatek.com> | 2022-03-22 15:26:52 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-03-29 15:41:30 +0000 |
| commit | 41faa22c532def4093a65366764d12298c6a10d3 (patch) | |
| tree | bab1e19cde50a07e1e04f1b81e52b30979f54b15 /src/soc/mediatek/mt8195/include/soc/memlayout.ld | |
| parent | 3a6ab474e0dbb92916d09fe3a8a7321cbe1511bf (diff) | |
| download | coreboot-41faa22c532def4093a65366764d12298c6a10d3.tar.gz coreboot-41faa22c532def4093a65366764d12298c6a10d3.tar.bz2 coreboot-41faa22c532def4093a65366764d12298c6a10d3.zip | |
soc/mediatek: Add early_init for passing data across stages
Add support for "early_init_data" region, which can be used to store
data initialized in an early stage (such as bootblock), and retrieve it
in later stages (such as ramstage).
TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15b7
PCI SSVID : 0x15b7
SN : 21517J440114
MN : WDC PC SN530 SDBPTPZ-256G-1006
RAB : 0x4
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
BRANCH=cherry
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I01f91b7fe2cbe4f73b5c616bb7aae778dee27d9a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/include/soc/memlayout.ld')
0 files changed, 0 insertions, 0 deletions