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| author | Jianjun Wang <jianjun.wang@mediatek.com> | 2022-03-14 20:38:18 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-16 16:55:26 +0000 |
| commit | c0808b64978056e72514525733e290b495cc0777 (patch) | |
| tree | 6e2b3524085e84450e445adb108d1f6aa03d484c /src/soc/mediatek/mt8195/include/soc | |
| parent | d59b3dd08540b7cf42dc98d68da42b2a4305f6ee (diff) | |
| download | coreboot-c0808b64978056e72514525733e290b495cc0777.tar.gz coreboot-c0808b64978056e72514525733e290b495cc0777.tar.bz2 coreboot-c0808b64978056e72514525733e290b495cc0777.zip | |
soc/mediatek: Add chip config for setting PCIe config
Add chip config for setting PCIe config.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15b7
PCI SSVID : 0x15b7
SN : 21517J440114
MN : WDC PC SN530 SDBPTPZ-256G-1006
RAB : 0x4
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Icff83f2a9f76862065987a74cfcc7e511be80a20
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/include/soc')
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/pcie.h | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/soc_chip.h | 8 |
2 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/pcie.h b/src/soc/mediatek/mt8195/include/soc/pcie.h index 097853164594..21a66681e4d1 100644 --- a/src/soc/mediatek/mt8195/include/soc/pcie.h +++ b/src/soc/mediatek/mt8195/include/soc/pcie.h @@ -5,7 +5,7 @@ #include <soc/pcie_common.h> +void mtk_pcie_reset(uintptr_t reg, bool enable); void mtk_pcie_pre_init(void); -void mtk_pcie_get_hw_info(struct mtk_pcie_controller *ctrl); #endif diff --git a/src/soc/mediatek/mt8195/include/soc/soc_chip.h b/src/soc/mediatek/mt8195/include/soc/soc_chip.h new file mode 100644 index 000000000000..6b3c354445d3 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/soc_chip.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_SOC_CHIP_H +#define SOC_MEDIATEK_SOC_CHIP_H + +#include "../../chip.h" + +#endif /* SOC_MEDIATEK_SOC_CHIP_H */ |