summaryrefslogtreecommitdiffstats
path: root/src/soc/mediatek/mt8195/include
diff options
context:
space:
mode:
authorChun-Jie Chen <chun-jie.chen@mediatek.corp-partner.google.com>2022-02-22 14:53:20 +0800
committerHung-Te Lin <hungte@chromium.org>2022-03-27 02:17:16 +0000
commit3708cb56cba73f5e421cfe1dd4a75c784d019301 (patch)
treedef04b5cd98dbf4680b81436ef14088c74db8621 /src/soc/mediatek/mt8195/include
parenta6562bd221b42b22bbd9f85326f6631a3c51dd5c (diff)
downloadcoreboot-3708cb56cba73f5e421cfe1dd4a75c784d019301.tar.gz
coreboot-3708cb56cba73f5e421cfe1dd4a75c784d019301.tar.bz2
coreboot-3708cb56cba73f5e421cfe1dd4a75c784d019301.zip
soc/mediatek/mt8195: Update audio and adsp power control
To control I2S in MT8195 for dojo project, we need to enable adsp power before audio power. Therefore, we need to update bus protection steps to correct the setting. TEST=build pass BUG=b:204391159 BRANCH=cherry Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Change-Id: I0bcf1ddeebf0d3df0a1d6b22273123be1aaf85a8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63106 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
-rw-r--r--src/soc/mediatek/mt8195/include/soc/spm.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/spm.h b/src/soc/mediatek/mt8195/include/soc/spm.h
index 945852a560f5..25f6d6b14ad0 100644
--- a/src/soc/mediatek/mt8195/include/soc/spm.h
+++ b/src/soc/mediatek/mt8195/include/soc/spm.h
@@ -946,6 +946,7 @@ struct mtk_spm_regs {
check_member(mtk_spm_regs, pwr_status, 0x016c);
check_member(mtk_spm_regs, audio_pwr_con, 0x0358);
+check_member(mtk_spm_regs, adsp_pwr_con, 0x0360);
check_member(mtk_spm_regs, ap_mdsrc_req, 0x043c);
check_member(mtk_spm_regs, ulposc_con, 0x644);
@@ -1000,10 +1001,16 @@ static const struct power_domain_data disp[] = {
static const struct power_domain_data audio[] = {
{
+ .pwr_con = &mtk_spm->adsp_pwr_con,
+ .pwr_sta_mask = 0x1 << 10,
+ .sram_pdn_mask = 0x1 << 8,
+ .sram_ack_mask = 0x1 << 12,
+ },
+ {
.pwr_con = &mtk_spm->audio_pwr_con,
- .pwr_sta_mask = AUDIO_PWR_STA_MASK,
- .sram_pdn_mask = AUDIO_SRAM_PDN_MASK,
- .sram_ack_mask = AUDIO_SRAM_ACK_MASK,
+ .pwr_sta_mask = 0x1 << 8,
+ .sram_pdn_mask = 0x1 << 8,
+ .sram_ack_mask = 0x1 << 12,
},
};