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| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-08-13 16:34:26 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-08-23 06:03:52 +0000 |
| commit | 8316db207d9e3fb55f51cb6bce642549d9364ff0 (patch) | |
| tree | 559c715e595b6a991afa881aeec0948208044160 /src/soc/mediatek/mt8195/include | |
| parent | a3ce81d28bfa4a8cdf7c30f374a9782a678a5159 (diff) | |
| download | coreboot-8316db207d9e3fb55f51cb6bce642549d9364ff0.tar.gz coreboot-8316db207d9e3fb55f51cb6bce642549d9364ff0.tar.bz2 coreboot-8316db207d9e3fb55f51cb6bce642549d9364ff0.zip | |
soc/mediatek/mt8195: add HDMI low power setting
Add HDMI low power setting to reduce power consumption.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ica91645789e5de3401131e7050d2b1ee06c535dd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57042
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/hdmi.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/hdmi.h b/src/soc/mediatek/mt8195/include/soc/hdmi.h new file mode 100644 index 000000000000..e42a250f6c79 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/hdmi.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_HDMI_H +#define SOC_MEDIATEK_MT8195_HDMI_H + +#define HDMI_TX_BASE_REG 0x11D5F000 +#define HDMI_RX_BASE_REG 0x11D60000 + +#define HDMI_PROTECT_REG (HDMI_TX_BASE_REG + 0xD0) + +#define HDMI_RX_PDN_0_REG (HDMI_RX_BASE_REG + 0x464) +#define HDMI_RX_PDN_1_REG (HDMI_RX_BASE_REG + 0x564) +#define HDMI_RX_PDN_2_REG (HDMI_RX_BASE_REG + 0x468) +#define HDMI_RX_PDN_3_REG (HDMI_RX_BASE_REG + 0x568) +#define HDMI_RX_PDN_4_REG (HDMI_RX_BASE_REG + 0x46c) +#define HDMI_RX_PDN_5_REG (HDMI_RX_BASE_REG + 0x56c) +#define HDMI_RX_PDN_6_REG (HDMI_RX_BASE_REG + 0x2000) +#define HDMI_RX_PDN_7_REG (HDMI_RX_BASE_REG + 0x2080) +#define HDMI_TX_PDN_REG (HDMI_TX_BASE_REG + 0x40) + +#define HDMI_RX_PDN_0_VAL 0xFFFFFC00 +#define HDMI_RX_PDN_1_VAL 0xFFFFFC00 +#define HDMI_RX_PDN_2_VAL 0xFFFFFFFF +#define HDMI_RX_PDN_3_VAL 0xFFFFFFFF +#define HDMI_RX_PDN_4_VAL 0xFFFF000F +#define HDMI_RX_PDN_5_VAL 0xFFFF000F +#define HDMI_RX_PDN_6_VAL 0xFFFF0006 +#define HDMI_RX_PDN_7_VAL 0xFFFF0007 +#define HDMI_TX_PDN_VAL 0x0012C561 + +void hdmi_low_power_setting(void); + +#endif |