soc/mediatek/mt8195: complete devapc settings

In previous patch (CB:56764), only basic settings were added.
Now complete devapc settings on MT8195.

1. Update permission setting
2. Updtate master domain setting:
   - domain 1: PCIE0, PCIE1
   - domain 2: SPM, SSPM, CPU_EB
3. Set domain remap
   - MMSYS (4-bit to 2-bit)
   - TINYSYS (4-bit to 3-bit)
   - TINYSYS (3-bit to 4-bit)
   - TINYSYS to EMI (3-bit to 4-bit)
   - INFRA2 (3-bit to 4-bit)
4. Set SCP domain and ADSP domain
   - domain 3: SCP
   - domain 4: ADSP

BUG=b:204347737
TEST=sanity test pass

Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59746
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2 files changed, 35 insertions, 13 deletions

diff --git a/src/soc/mediatek/mt8195/include/soc/addressmap.h b/src/soc/mediatek/mt8195/include/soc/addressmap.h
index d9486b3d0b25..e5fd8220b67d 100644
--- a/src/soc/mediatek/mt8195/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8195/include/soc/addressmap.h
@@ -43,6 +43,7 @@ enum {
 	I2C_DMA_BASE		= IO_PHYS + 0x00220080,
 	EMI1_SUB_BASE		= IO_PHYS + 0x00225000,
 	EMI0_MPU_BASE		= IO_PHYS + 0x00226000,
+	DEVAPC_INFRA2_AO_BASE   = IO_PHYS + 0x00228000,
 	DRAMC_CHA_AO_BASE	= IO_PHYS + 0x00230000,
 	INFRA_TRACKER_BASE	= IO_PHYS + 0x00314000,
 	SSPM_SRAM_BASE		= IO_PHYS + 0x00400000,
diff --git a/src/soc/mediatek/mt8195/include/soc/devapc.h b/src/soc/mediatek/mt8195/include/soc/devapc.h
index df8197214a66..5267b3b2e983 100644
--- a/src/soc/mediatek/mt8195/include/soc/devapc.h
+++ b/src/soc/mediatek/mt8195/include/soc/devapc.h
@@ -17,10 +17,17 @@ enum devapc_ao_offset {
 	DOM_REMAP_1_1 = 0x814,
 	DOM_REMAP_2_0 = 0x820,
 	MAS_DOM_0 = 0x0900,
+	MAS_DOM_4 = 0x0910,
 	MAS_SEC_0 = 0x0A00,
 	AO_APC_CON = 0x0F00,
 };
 
+enum scp_offset {
+	SCP_DOM = 0xA5080,
+	ADSP_DOM = 0xA5088,
+	ONETIME_LOCK = 0xA5104,
+};
+
 /******************************************************************************
  * STRUCTURE DEFINITION
  ******************************************************************************/
@@ -96,18 +103,23 @@ struct apc_infra_peri_dom_4 {
 			 PERM_ATTR12, PERM_ATTR13, \
 			 PERM_ATTR14, PERM_ATTR15)
 
+#define NO_PROTECTION2 NO_PROTECTION, NO_PROTECTION
+#define NO_PROTECTION3 NO_PROTECTION2, NO_PROTECTION
+
+#define FORBIDDEN2 FORBIDDEN, FORBIDDEN
 #define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN
 #define FORBIDDEN7 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
 		    FORBIDDEN, FORBIDDEN
-#define FORBIDDEN12 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
-		    FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
-		    FORBIDDEN, FORBIDDEN
-#define FORBIDDEN13 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
+#define FORBIDDEN10 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
 		    FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
-		    FORBIDDEN, FORBIDDEN, FORBIDDEN
-#define FORBIDDEN15 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
+		    FORBIDDEN
+#define FORBIDDEN11 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
 		    FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
-		    FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN
+		    FORBIDDEN
+#define FORBIDDEN12 FORBIDDEN11, FORBIDDEN
+#define FORBIDDEN13 FORBIDDEN12, FORBIDDEN
+#define FORBIDDEN14 FORBIDDEN13, FORBIDDEN
+#define FORBIDDEN15 FORBIDDEN14, FORBIDDEN
 
 enum devapc_sys_dom_num {
 	DOM_NUM_INFRA_AO_SYS0 = 16,
@@ -144,6 +156,10 @@ enum devapc_cfg_index {
 DEFINE_BIT(CPU_EB_SEC, 1)
 
 DEFINE_BITFIELD(CPU_EB_DOM, 11, 8)	/* 1 */
+DEFINE_BITFIELD(SCP_SSPM_DOM, 19, 16)	/* 2 */
+
+/* PERI */
+DEFINE_BITFIELD(SPM_DOM, 11, 8)		/* 1 */
 
 /* PERI_PAR */
 DEFINE_BIT(SSUSB_SEC, 21)
@@ -153,6 +169,9 @@ DEFINE_BIT(SSUSB_P1_1_SEC, 2)
 DEFINE_BIT(SSUSB_P2_SEC, 3)
 DEFINE_BIT(SSUSB_P3_SEC, 4)
 
+DEFINE_BITFIELD(PCIE0_DOM, 11, 8)	/* 17 */
+DEFINE_BITFIELD(PCIE1_DOM, 19, 16)	/* 18 */
+
 /* Domain Remap */
 DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_0,  3,  0)
 DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_1,  7,  4)
@@ -168,11 +187,13 @@ DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_1,  5,  3)
 DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_2,  8,  6)
 DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_3, 11,  9)
 DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_4, 14, 12)
-
-DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0)
-DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2)
-DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4)
-DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6)
-DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8)
+DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_5, 17, 15)
+
+DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0,  1,  0)
+DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1,  3,  2)
+DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2,  5,  4)
+DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3,  7,  6)
+DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4,  9,  8)
+DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_5, 11, 10)
 
 #endif /* SOC_MEDIATEK_MT8195_DEVAPC_H */