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authorYidi Lin <yidi.lin@mediatek.com>2021-01-07 20:25:54 +0800
committerHung-Te Lin <hungte@chromium.org>2021-04-13 06:07:54 +0000
commit24ea3f3364711f352a8a174e6fc0f22885725ed5 (patch)
tree4f055221846c974ec16c5d4aa7f7838cfe1ce55e /src/soc/mediatek/mt8195/spi.c
parent2bb361f0f5151f0cbf0bfcde085c05ca38c42de9 (diff)
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soc/mediatek/mt8195: Add a stub implementation of the MT8195 SoC
TEST=boot from SPI-NOR and show console message at bootblock stage. Change-Id: Ia93430006096b7410393ab31fee4ea40598d0b34 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52258 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/spi.c')
-rw-r--r--src/soc/mediatek/mt8195/spi.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/spi.c b/src/soc/mediatek/mt8195/spi.c
new file mode 100644
index 000000000000..459e46a150e6
--- /dev/null
+++ b/src/soc/mediatek/mt8195/spi.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/spi.h>
+
+static const struct spi_ctrlr spi_flash_ctrlr = {
+ .max_xfer_size = 65535,
+};
+
+const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
+ {
+ .ctrlr = &spi_flash_ctrlr,
+ },
+};
+
+const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);