diff options
| author | Yidi Lin <yidilin@chromium.org> | 2024-01-09 11:50:27 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-10 14:21:20 +0000 |
| commit | c4e14c2929c9b510c05ac7e54a9d0c441056f5e5 (patch) | |
| tree | c5d9c2a80eeec2bfb028a6b6868b3daf6429fc98 /src/soc/mediatek | |
| parent | cb7c4fdbd6c75d4ce9a2a5136b45f887bcf21d15 (diff) | |
| download | coreboot-c4e14c2929c9b510c05ac7e54a9d0c441056f5e5.tar.gz coreboot-c4e14c2929c9b510c05ac7e54a9d0c441056f5e5.tar.bz2 coreboot-c4e14c2929c9b510c05ac7e54a9d0c441056f5e5.zip | |
mb/google/cherry: Use common mtk_display_init()
TEST=check FW screen on dojo
Change-Id: Ie870899226588ac2a2e80f77e434455f4913d387
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek')
| -rw-r--r-- | src/soc/mediatek/common/display.c | 7 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/ddp.c | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/ddp.h | 4 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/dsi.h | 8 |
5 files changed, 18 insertions, 4 deletions
diff --git a/src/soc/mediatek/common/display.c b/src/soc/mediatek/common/display.c index d51151ecab06..a5b0e6b031c1 100644 --- a/src/soc/mediatek/common/display.c +++ b/src/soc/mediatek/common/display.c @@ -43,6 +43,13 @@ __weak int mtk_edp_init(struct edid *edid) return -1; } +__weak int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes, + const struct edid *edid, const u8 *init_commands) +{ + printk(BIOS_WARNING, "%s: Not supported\n", __func__); + return -1; +} + int mtk_display_init(void) { struct edid edid; diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index 73ea6faccd26..56a10bc2f246 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -45,6 +45,7 @@ ramstage-y += ../common/early_init.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += ../common/devapc.c devapc.c ramstage-y += ../common/dfd.c +ramstage-y += ../common/display.c ramstage-y += ../common/dpm.c ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c diff --git a/src/soc/mediatek/mt8195/ddp.c b/src/soc/mediatek/mt8195/ddp.c index 6277fa4caf64..2bd95a2fac21 100644 --- a/src/soc/mediatek/mt8195/ddp.c +++ b/src/soc/mediatek/mt8195/ddp.c @@ -150,7 +150,7 @@ void mtk_ddp_init(void) write32((void *)(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0), 0); } -void mtk_ddp_mode_set(const struct edid *edid) +void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path) { u32 fmt = OVL_INFMT_RGBA8888; u32 bpp = edid->framebuffer_bits_per_pixel / 8; diff --git a/src/soc/mediatek/mt8195/include/soc/ddp.h b/src/soc/mediatek/mt8195/include/soc/ddp.h index 339449002ad9..52bf9aec3525 100644 --- a/src/soc/mediatek/mt8195/include/soc/ddp.h +++ b/src/soc/mediatek/mt8195/include/soc/ddp.h @@ -5,6 +5,7 @@ #include <soc/addressmap.h> #include <soc/ddp_common.h> +#include <soc/display.h> #include <types.h> #define MAIN_PATH_OVL_NR 2 @@ -366,7 +367,4 @@ enum { SMI_LARB_PORT_L0_OVL_RDMA0 = 0x388, }; -void mtk_ddp_init(void); -void mtk_ddp_mode_set(const struct edid *edid); - #endif diff --git a/src/soc/mediatek/mt8195/include/soc/dsi.h b/src/soc/mediatek/mt8195/include/soc/dsi.h new file mode 100644 index 000000000000..0fd65b93f850 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/dsi.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_DSI_H +#define SOC_MEDIATEK_MT8195_DSI_H + +#include <soc/dsi_common.h> + +#endif |