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| author | Cong Yang <yangcong5@huaqin.corp-partner.google.com> | 2023-04-11 20:10:59 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-14 12:08:14 +0000 |
| commit | de7e014067b2c84a2edf8b790a4f009aa9471ec6 (patch) | |
| tree | c0fe236b3a877ef8ed12321d8777063178b41f18 /src/soc/mediatek | |
| parent | 36e6f9bc047f86e1628c8c41d3ac16d80fb344de (diff) | |
| download | coreboot-de7e014067b2c84a2edf8b790a4f009aa9471ec6.tar.gz coreboot-de7e014067b2c84a2edf8b790a4f009aa9471ec6.tar.bz2 coreboot-de7e014067b2c84a2edf8b790a4f009aa9471ec6.zip | |
soc/mediatek: Add support for regulator VIO18
To provide power to MIPI panel STA_HIMAX83102_J02, add support for
regulator VIO18.
BUG=b:272425116
TEST=test firmware display pass for STA_HIMAX83102_J02 on Starmie.
Change-Id: I3c3aa105e648b87fc39f881d762002f67b4422b5
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74341
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com>
Diffstat (limited to 'src/soc/mediatek')
| -rw-r--r-- | src/soc/mediatek/common/include/soc/regulator.h | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/include/soc/mt6366.h | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/mt6366.c | 18 |
3 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h index e2b92517fdce..3cec8f06eb6b 100644 --- a/src/soc/mediatek/common/include/soc/regulator.h +++ b/src/soc/mediatek/common/include/soc/regulator.h @@ -23,6 +23,7 @@ enum mtk_regulator { MTK_REGULATOR_VRF12, MTK_REGULATOR_VCN33, MTK_REGULATOR_VDD18, + MTK_REGULATOR_VIO18, MTK_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/mt8186/include/soc/mt6366.h b/src/soc/mediatek/mt8186/include/soc/mt6366.h index 2315a24a7631..b64cd8a17ad5 100644 --- a/src/soc/mediatek/mt8186/include/soc/mt6366.h +++ b/src/soc/mediatek/mt8186/include/soc/mt6366.h @@ -39,6 +39,7 @@ enum { PMIC_VDRAM1_DBG0 = 0x161e, PMIC_VDRAM1_VOSEL = 0x1626, PMIC_SMPS_ANA_CON0 = 0x1808, + PMIC_LDO_VIO18_CON0 = 0x1aec, PMIC_VDDQ_OP_EN = 0x1b16, PMIC_VSRAM_PROC12_OP_EN = 0x1b90, PMIC_VSRAM_PROC12_DBG0 = 0x1ba2, @@ -67,6 +68,7 @@ enum mt6366_regulator_id { MT6366_VSRAM_PROC12, MT6366_VRF12, MT6366_VCN33, + MT6366_VIO18, MT6366_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c index 7ef8c24637b2..7874c08d68d7 100644 --- a/src/soc/mediatek/mt8186/mt6366.c +++ b/src/soc/mediatek/mt8186/mt6366.c @@ -787,6 +787,19 @@ static void pmic_set_vcn33_vol(u32 vcn33_uv) pwrap_write_field(PMIC_LDO_VCN33_CON0_0, 1, 0x1, 0); } +#define VIO18_VOLTAGE_UV 1800000 + +static u32 pmic_get_vio18_vol(void) +{ + return pwrap_read_field(PMIC_LDO_VIO18_CON0, 0x1, 0) ? VIO18_VOLTAGE_UV : 0; +} + +static void pmic_set_vio18_vol(u32 vio18_uv) +{ + assert(vio18_uv == VIO18_VOLTAGE_UV); + pwrap_write_field(PMIC_LDO_VIO18_CON0, 1, 0x1, 0); +} + static void pmic_wdt_set(void) { /* [5]=1, RG_WDTRSTB_DEB */ @@ -914,6 +927,9 @@ void mt6366_set_voltage(enum mt6366_regulator_id id, u32 voltage_uv) case MT6366_VCN33: pmic_set_vcn33_vol(voltage_uv); break; + case MT6366_VIO18: + pmic_set_vio18_vol(voltage_uv); + break; default: printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); break; @@ -941,6 +957,8 @@ u32 mt6366_get_voltage(enum mt6366_regulator_id id) return pmic_get_vrf12_vol(); case MT6366_VCN33: return pmic_get_vcn33_vol(); + case MT6366_VIO18: + return pmic_get_vio18_vol(); default: printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); break; |