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| author | Ken Chang <kenc@nvidia.com> | 2014-04-15 17:00:17 +0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-15 20:18:08 +0100 |
| commit | 2d43a48158903fe41015b60808bbd7fa339f96b9 (patch) | |
| tree | b5a795025ead95287ed1e1e999a90d4bba5853c1 /src/soc/nvidia/tegra124/dp.c | |
| parent | 1a8e0af78b1886acc96d1e80be5871d287d148c5 (diff) | |
| download | coreboot-2d43a48158903fe41015b60808bbd7fa339f96b9.tar.gz coreboot-2d43a48158903fe41015b60808bbd7fa339f96b9.tar.bz2 coreboot-2d43a48158903fe41015b60808bbd7fa339f96b9.zip | |
tegra124: set MOT bit for I2C-over-AUX
According to DP version 1.2a, The MOT (Middle-of-Transaction) bit
must be set when the I2C transaction does not stop with the current
AUX transaction.
Thus the correct steps for an I2C read shall be:
1. I2C command write with MOT set to 1
2. I2C command read to the same address with MOT set to 0
BUG=chrome-os-partner:27679
TEST=EDID data read from LP140WH8 panel is correct while it's a
repeated pattern of the first 16 bytes without this CL
BRANCH=none
Original-Change-Id: I0526beffb8852fbbe0eb5bb80e370261617a59b8
Original-Signed-off-by: Ken Chang <kenc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/194915
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 466ab0e00744f79ae3720474140d95e5f0828de9)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ic8ad38b4b08989dd7178d59151e1e276b8a58439
Reviewed-on: http://review.coreboot.org/7763
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/dp.c')
| -rw-r--r-- | src/soc/nvidia/tegra124/dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c index e5c0632bb42c..f539ec353469 100644 --- a/src/soc/nvidia/tegra124/dp.c +++ b/src/soc/nvidia/tegra124/dp.c @@ -337,7 +337,7 @@ int tegra_dc_i2c_aux_read(struct tegra_dc_dp_data *dp, u32 i2c_addr, u32 len = 1; ret = tegra_dc_dpaux_write_chunk( - dp, DPAUX_DP_AUXCTL_CMD_I2CWR, i2c_addr, + dp, DPAUX_DP_AUXCTL_CMD_MOTWR, i2c_addr, &addr, &len, aux_stat); if (ret) { printk(BIOS_ERR, "%s: error sending address to read.\n", |