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| author | Gabe Black <gabeblack@google.com> | 2014-02-08 05:17:38 -0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-12 02:25:31 +0100 |
| commit | 5cbbc702456ceab01b52bda49a2b991fde1658e7 (patch) | |
| tree | 65ab30a8c7720a013613594dd5ee5289952434bc /src/soc/nvidia/tegra124/soc.c | |
| parent | f220df6ff9876fdc3f9e3abc08f0965ac4f55814 (diff) | |
| download | coreboot-5cbbc702456ceab01b52bda49a2b991fde1658e7.tar.gz coreboot-5cbbc702456ceab01b52bda49a2b991fde1658e7.tar.bz2 coreboot-5cbbc702456ceab01b52bda49a2b991fde1658e7.zip | |
tegra124: nyan: Keep in memory structures below 4GB.
We'd been putting some data structures like the framebuffer and the cbmem at
the end of memory, but that may not actually be addressable as identity mapped
memory. This change clamps the addresses those structures are placed at so
they stay below 4GB.
BUG=None
TEST=Booted on nyan. Went into recovery mode and verified that there was a
recovery screen. Forced memory size to be 4GB and verified that the recovery
screen still shows up.
BRANCH=None
Original-Change-Id: I9e6b28212c113107d4f480b3dd846dd2349b3a91
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/185571
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 63ea1274a838dc739d302d7551f1db42034c5bd0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I970c1285270cb648bc67fa114d44c0841eab1615
Reviewed-on: http://review.coreboot.org/7397
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia/tegra124/soc.c')
| -rw-r--r-- | src/soc/nvidia/tegra124/soc.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra124/soc.c b/src/soc/nvidia/tegra124/soc.c index 8ad1aa9730c0..bc4795479005 100644 --- a/src/soc/nvidia/tegra124/soc.c +++ b/src/soc/nvidia/tegra124/soc.c @@ -35,8 +35,15 @@ static void soc_enable(device_t dev) unsigned long fb_size = FB_SIZE_MB; ram_resource(dev, 0, CONFIG_SYS_SDRAM_BASE/KiB, - (sdram_size_mb() - fb_size)*KiB); + (sdram_max_addressable_mb() - fb_size)*KiB - + CONFIG_SYS_SDRAM_BASE/KiB); mmio_resource(dev, 1, lcdbase*KiB, fb_size*KiB); + + u32 sdram_end_mb = sdram_size_mb() + CONFIG_SYS_SDRAM_BASE/MiB; + + if (sdram_end_mb > sdram_max_addressable_mb()) + ram_resource(dev, 2, sdram_max_addressable_mb()*KiB, + (sdram_end_mb - sdram_max_addressable_mb())*KiB); } static void soc_init(device_t dev) |