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| author | Furquan Shaikh <furquan@google.com> | 2015-07-07 21:35:56 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-13 09:19:34 +0200 |
| commit | 3ae5044b7330ea4af0214b7db29749eed17f2e66 (patch) | |
| tree | b01c3bca82b607bf24ce4aee2fca29e6208d0c4f /src/soc/nvidia/tegra210/mmu_operations.c | |
| parent | ccc55fdc6fae37a085e9f1a8a19a539728907ca1 (diff) | |
| download | coreboot-3ae5044b7330ea4af0214b7db29749eed17f2e66.tar.gz coreboot-3ae5044b7330ea4af0214b7db29749eed17f2e66.tar.bz2 coreboot-3ae5044b7330ea4af0214b7db29749eed17f2e66.zip | |
t210: Add TZDRAM_BASE param to BL31_MAKEARGS
1. Make TTB_SIZE Kconfig option
2. Add Kconfig option for maximum secure component size
3. Add check in Makefile to ensure that Trustzone area is big enough
to hold TTB and secure components
4. Calculate TZDRAM_BASE depending upon TTB_SIZE and TZ_CARVEOUT_SIZE
BUG=chrome-os-partner:42319
BRANCH=None
Change-Id: I9ceb46ceedc931826657e5a0f6fc2b1886526bf8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a425d4978a467b157ea5d71e600242ebf427b5bb
Original-Change-Id: I152a38830773d85aafab49c92cef945b7c4eb62c
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/284074
Original-Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10878
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/mmu_operations.c')
| -rw-r--r-- | src/soc/nvidia/tegra210/mmu_operations.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra210/mmu_operations.c b/src/soc/nvidia/tegra210/mmu_operations.c index 2ee6b80ac454..66a93e1878e2 100644 --- a/src/soc/nvidia/tegra210/mmu_operations.c +++ b/src/soc/nvidia/tegra210/mmu_operations.c @@ -77,7 +77,7 @@ void tegra210_mmu_init(void) /* Place page tables at the base of the trust zone region. */ carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib); tz_base_mib *= MiB; - ttb_size_mib = TTB_SIZE * MiB; + ttb_size_mib = CONFIG_TTB_SIZE_MB * MiB; mmu_init(map, (void *)tz_base_mib, ttb_size_mib); mmu_enable(); } |