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| author | Furquan Shaikh <furquan@google.com> | 2015-03-17 17:53:19 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-23 22:58:26 +0200 |
| commit | 018216d120bc19da71e2586a7b437d56ec07494e (patch) | |
| tree | 3b267edebb771d95f7883689e87ec48569a432d0 /src/soc/nvidia/tegra | |
| parent | 59aa2b191b5b510e6a0567f6d2be5d1b97195c95 (diff) | |
| download | coreboot-018216d120bc19da71e2586a7b437d56ec07494e.tar.gz coreboot-018216d120bc19da71e2586a7b437d56ec07494e.tar.bz2 coreboot-018216d120bc19da71e2586a7b437d56ec07494e.zip | |
tegra: Move pinmux enum constants from tegra/pinmux.h to soc-specific pinmux.h
Since pinmux register format has changed completely for t210, move the
constants to pinmux.h in soc-specific folders.
BUG=chrome-os-partner:37546
BRANCH=None
TEST=Compiles successfully for ryu and foster.
Change-Id: Ic1680ac50fc2619657d0c610a5dfc3fb51df7286
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7844c941a6187f884b31a8f7cc52e64268d2c732
Original-Change-Id: Icd3b2a72f3698e0772e888d9209e1fcd5d10e77d
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/260900
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10631
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia/tegra')
| -rw-r--r-- | src/soc/nvidia/tegra/pinmux.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/soc/nvidia/tegra/pinmux.h b/src/soc/nvidia/tegra/pinmux.h index 23947b348c9c..5e6de67352de 100644 --- a/src/soc/nvidia/tegra/pinmux.h +++ b/src/soc/nvidia/tegra/pinmux.h @@ -25,20 +25,4 @@ void pinmux_set_config(int pin_index, uint32_t config); uint32_t pinmux_get_config(int pin_index); -enum { - PINMUX_FUNC_MASK = 3 << 0, - - PINMUX_PULL_MASK = 3 << 2, - PINMUX_PULL_NONE = 0 << 2, - PINMUX_PULL_DOWN = 1 << 2, - PINMUX_PULL_UP = 2 << 2, - - PINMUX_TRISTATE = 1 << 4, - PINMUX_INPUT_ENABLE = 1 << 5, - PINMUX_OPEN_DRAIN = 1 << 6, - PINMUX_LOCK = 1 << 7, - PINMUX_IO_RESET = 1 << 8, - PINMUX_RCV_SEL = 1 << 9 -}; - #endif /* __SOC_NVIDIA_TEGRA_PINMUX_H__ */ |