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authorDan Ehrenberg <dehrenberg@chromium.org>2014-10-23 17:46:39 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-10 11:57:48 +0200
commitcb3b0c5a0dd5164fb4a8c0c6b8d2656948748343 (patch)
treef1d3fe7e9431b9a3fc1a64b1cf8685ba2419b841 /src/soc/qualcomm/ipq806x/include/soc/cdp.h
parent886d29bcd808476e0e83f68e3f7905fba4304b0a (diff)
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storm: Initialize clock, pinmux for NAND if present on board
This patch runs basic NAND initialization code on Proto 0.2 boards which have been reworked for NAND. It makes sense to do this in coreboot for two reasons: - In general, it is reasonable for coreboot to initialize clocks and such in preparation for depthcharge's use. Waiting times can be pooled, and the initialization itself here is very fast. - There is a kernel bug which requires that the clock is already initialized before the kernel loads NAND support. coreboot is a more sensible place to put a workaround than depthcharge because depthcharge initializes things lazily, but when booting from USB, depthcharge won't need to look at NAND. This change involves bringing in an additional header file, ebi2.h, from U-Boot. TEST=Booted a kernel from USB and verified that NAND came up without any depthcharge hacks, whereas previously a USB-booted kernel would be unable to access NAND even with the same drivers compiled in due to an initialization failure. BUG=chromium:403432 BRANCH=none Change-Id: I04e99cb39d16848a6ed75fe0229b8f79bdf2e035 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9be29da5ccad9982f146ae00344f30598ef2371c Original-Signed-off-by: Dan Ehrenberg <dehrenberg@chromium.org> Original-Change-Id: I1760ecb4e47438311d80e34326e45578c608481c Original-Reviewed-on: https://chromium-review.googlesource.com/225277 Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/9402 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/include/soc/cdp.h')
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/cdp.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/soc/cdp.h b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
index c7de23f4e87d..bb2151cd2d80 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
@@ -106,6 +106,12 @@ typedef struct {
#define IPQ_GMAC_NMACS 4
+enum storm_board_id {
+ BOARD_ID_PROTO_0 = 0,
+ BOARD_ID_PROTO_0_2 = 1,
+ BOARD_ID_PROTO_0_2_NAND = 26,
+};
+
/* Board specific parameters */
typedef struct {
#if 0
@@ -136,4 +142,7 @@ static inline int gmac_cfg_is_valid(ipq_gmac_board_cfg_t *cfg)
unsigned int get_board_index(unsigned machid);
void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count);
-#endif
+
+void board_nand_init(void);
+
+#endif /* _IPQ806X_CDP_H_ */