diff options
| author | Nitheesh Sekar <nsekar@codeaurora.org> | 2018-09-14 11:24:10 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-18 18:16:27 +0000 |
| commit | 20e75878a8ff47d18d87cd8d213d044cffcaeee7 (patch) | |
| tree | 8105702fd2e3a297409d66b458826bacc8a62cca /src/soc/qualcomm/qcs405/include/soc/gpio.h | |
| parent | ad5e0a8e65b391706ed04227214f1d4eb4f63763 (diff) | |
| download | coreboot-20e75878a8ff47d18d87cd8d213d044cffcaeee7.tar.gz coreboot-20e75878a8ff47d18d87cd8d213d044cffcaeee7.tar.bz2 coreboot-20e75878a8ff47d18d87cd8d213d044cffcaeee7.zip | |
soc/qualcomm/qcs405: Support for new SoC
Adding the basic infrastruture soc support for qcs405 and
a new build variant.
TEST=build
Change-Id: Ia379cf375e4459ed55cc36cb8a0a92cab18b705e
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29948
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/qcs405/include/soc/gpio.h')
| -rw-r--r-- | src/soc/qualcomm/qcs405/include/soc/gpio.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/qualcomm/qcs405/include/soc/gpio.h b/src/soc/qualcomm/qcs405/include/soc/gpio.h new file mode 100644 index 000000000000..e1ad453e4e42 --- /dev/null +++ b/src/soc/qualcomm/qcs405/include/soc/gpio.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_QUALCOMM_QCS405_GPIO_H_ +#define _SOC_QUALCOMM_QCS405_GPIO_H_ + +#include <types.h> + +typedef u32 gpio_t; + +#endif // _SOC_QUALCOMM_QCS405_GPIO_H_ |