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| author | huang lin <hl@rock-chips.com> | 2016-03-02 18:38:40 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-04-13 23:37:55 +0200 |
| commit | c14b54dd170cb2fae16a5086134208caba0593f8 (patch) | |
| tree | 1c413ebbddf0af3af98e2529b479ccad866c21b6 /src/soc/rockchip/rk3399/Kconfig | |
| parent | 46f8bd70efdf6c00336477ae792157676d68fd04 (diff) | |
| download | coreboot-c14b54dd170cb2fae16a5086134208caba0593f8.tar.gz coreboot-c14b54dd170cb2fae16a5086134208caba0593f8.tar.bz2 coreboot-c14b54dd170cb2fae16a5086134208caba0593f8.zip | |
rockchip/rk3399: Add a stub implementation of the rk3399 SOC
Most things still need to be filled in, but this will allow
us to build boards which use this SOC.
BRANCH=none
BUG=chrome-os-partner:51537
TEST=with the rest of the patches applied Kevin board can be booted to
Linux login propmt.
Change-Id: I6f2407ff578dcd3d0daed86dd03d8f5f4edcac53
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 27dfc39efe95025be2271e2e00e9df93b7907840
Original-Change-Id: I6f2407ff578dcd3d0daed86dd03d8f5f4edcac53
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/332385
Reviewed-on: https://review.coreboot.org/13915
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399/Kconfig')
| -rw-r--r-- | src/soc/rockchip/rk3399/Kconfig | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/Kconfig b/src/soc/rockchip/rk3399/Kconfig new file mode 100644 index 000000000000..0c1f258ded3e --- /dev/null +++ b/src/soc/rockchip/rk3399/Kconfig @@ -0,0 +1,26 @@ +config SOC_ROCKCHIP_RK3399 + bool + default n + select ARCH_BOOTBLOCK_ARMV8_64 + select ARCH_RAMSTAGE_ARMV8_64 + select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_VERSTAGE_ARMV8_64 + select ARM64_A53_ERRATUM_843419 + select BOOTBLOCK_CONSOLE + select GENERIC_UDELAY + select HAVE_MONOTONIC_TIMER + select HAVE_UART_SPECIAL + select UNCOMPRESSED_RAMSTAGE + +if SOC_ROCKCHIP_RK3399 + +config CHROMEOS + select RETURN_FROM_VERSTAGE + select SEPARATE_VERSTAGE + select VBOOT_STARTS_IN_BOOTBLOCK + +config PMIC_BUS + int + default -1 + +endif |