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| author | Philipp Hug <philipp@hug.cx> | 2018-07-11 13:22:34 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-10 15:05:11 +0000 |
| commit | ea81928e948a01dde897b90e8e7454a71d9c0788 (patch) | |
| tree | 082c4b2fc86f3f60fd4b084742109525bf5becf5 /src/soc/sifive/fu540/Makefile.inc | |
| parent | 3b8ef2b01d80124982155620dec283ecc91cb221 (diff) | |
| download | coreboot-ea81928e948a01dde897b90e8e7454a71d9c0788.tar.gz coreboot-ea81928e948a01dde897b90e8e7454a71d9c0788.tar.bz2 coreboot-ea81928e948a01dde897b90e8e7454a71d9c0788.zip | |
soc/sifive/fu540: Add driver for OTP memory
Provides minimal functionality to read the SOC s/n from the NeoFuse
one time programmable memory.
Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/27435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/soc/sifive/fu540/Makefile.inc')
| -rw-r--r-- | src/soc/sifive/fu540/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/sifive/fu540/Makefile.inc b/src/soc/sifive/fu540/Makefile.inc index 677731a8af6b..12b814a6f7c1 100644 --- a/src/soc/sifive/fu540/Makefile.inc +++ b/src/soc/sifive/fu540/Makefile.inc @@ -21,11 +21,13 @@ bootblock-y += bootblock.c romstage-y += uart.c romstage-y += media.c romstage-y += sdram.c +romstage-y += otp.c ramstage-y += uart.c ramstage-y += media.c ramstage-y += sdram.c ramstage-y += cbmem.c +ramstage-y += otp.c CPPFLAGS_common += -Isrc/soc/sifive/fu540/include |