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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-04-07 07:16:48 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-07 12:53:19 +0000 |
| commit | 11cac784ff788b4f0495758d7f5992e457ea552c (patch) | |
| tree | 15439643f00444d5b3a3d9415475f208faec0ba4 /src/soc/sifive/fu540/clock.c | |
| parent | 0310d34c2f682b00431a052e770ad44656d1d6f6 (diff) | |
| download | coreboot-11cac784ff788b4f0495758d7f5992e457ea552c.tar.gz coreboot-11cac784ff788b4f0495758d7f5992e457ea552c.tar.bz2 coreboot-11cac784ff788b4f0495758d7f5992e457ea552c.zip | |
Replace some ENV_ROMSTAGE with ENV_RAMINIT
With a combined bootblock+romstage ENV_ROMSTAGE might no
longer evaluate true.
Change-Id: I733cf4e4ab177e35cd260318556ece1e73d082dc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63376
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/sifive/fu540/clock.c')
| -rw-r--r-- | src/soc/sifive/fu540/clock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c index 977f938eb443..a8baddef9a24 100644 --- a/src/soc/sifive/fu540/clock.c +++ b/src/soc/sifive/fu540/clock.c @@ -56,7 +56,7 @@ static struct prci_ctlr *prci = (void *)FU540_PRCI; #define PRCI_DEVICESRESET_GEMGXL_RST_N(x) (((x) & 0x1) << 5) /* Clock initialization should only be done in romstage. */ -#if ENV_ROMSTAGE +#if ENV_RAMINIT struct pll_settings { unsigned int divr:6; unsigned int divf:9; @@ -247,7 +247,7 @@ void clock_init(void) asm volatile ("fence"); } -#endif /* ENV_ROMSTAGE */ +#endif /* ENV_RAMINIT */ /* Get the core clock's frequency, in KHz */ int clock_get_coreclk_khz(void) |