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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-10-29 14:25:05 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:18:04 +0000 |
| commit | 90fd0727c7c3be143caef7fb397c093a3151ba3b (patch) | |
| tree | 9432ae44311f7559a6b8617a03bb42dc3051b84e /src/soc/sifive/fu540/clock.c | |
| parent | 6fe488b45fdd3c656b0a9f2858423d20bf374007 (diff) | |
| download | coreboot-90fd0727c7c3be143caef7fb397c093a3151ba3b.tar.gz coreboot-90fd0727c7c3be143caef7fb397c093a3151ba3b.tar.bz2 coreboot-90fd0727c7c3be143caef7fb397c093a3151ba3b.zip | |
soc/sifive/fu540: Simplify UART refclk calculation
clock_get_coreclk_khz() already detects whether the PLL or the input
clock (hfclk) is used.
Tested on HiFive Unleashed.
Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/sifive/fu540/clock.c')
| -rw-r--r-- | src/soc/sifive/fu540/clock.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c index 20dce23a646e..a8b61f17603c 100644 --- a/src/soc/sifive/fu540/clock.c +++ b/src/soc/sifive/fu540/clock.c @@ -242,6 +242,7 @@ void clock_init(void) } #endif /* ENV_ROMSTAGE */ +/* Get the core clock's frequency, in KHz */ int clock_get_coreclk_khz(void) { if (read32(&prci->coreclksel) & PRCI_CORECLK_MASK) |