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| author | Sam Lewis <sam.vr.lewis@gmail.com> | 2020-08-03 21:14:26 +1000 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:32:11 +0000 |
| commit | b5353965e1b7eff860faaa3312728a935311a8c6 (patch) | |
| tree | 3539cf17df86b814a8c74e87c915d47608c7cd5b /src/soc/ti | |
| parent | be34afad6fe2660919f488402cfcf685fdd47300 (diff) | |
| download | coreboot-b5353965e1b7eff860faaa3312728a935311a8c6.tar.gz coreboot-b5353965e1b7eff860faaa3312728a935311a8c6.tar.bz2 coreboot-b5353965e1b7eff860faaa3312728a935311a8c6.zip | |
soc/ti/am335x: Enable MMU in bootblock
Enables the MMU primarily to allow the unaligned word reads that the
FMAP code requires. Without enabling this, the chip gets data access
exceptions.
Enabling the MMU also gives some advantages in allowing the icache and
dcache to be enabled, so is probably worth doing regardless.
Change-Id: Ic571570cc44b0696ea61cc76e3bce7167a3256cf
Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/ti')
| -rw-r--r-- | src/soc/ti/am335x/bootblock.c | 22 | ||||
| -rw-r--r-- | src/soc/ti/am335x/bootblock_media.c | 1 | ||||
| -rw-r--r-- | src/soc/ti/am335x/memlayout.ld | 9 |
3 files changed, 21 insertions, 11 deletions
diff --git a/src/soc/ti/am335x/bootblock.c b/src/soc/ti/am335x/bootblock.c index 985e1a1a0b81..11bc4593e193 100644 --- a/src/soc/ti/am335x/bootblock.c +++ b/src/soc/ti/am335x/bootblock.c @@ -4,13 +4,25 @@ #include <arch/cache.h> #include <bootblock_common.h> +#include <symbols.h> + +#define SRAM_START ((uintptr_t)_sram / MiB) +#define SRAM_END (DIV_ROUND_UP((uintptr_t)_esram, MiB)) + +#define DRAM_START ((uintptr_t)_dram / MiB) +#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB) void bootblock_soc_init(void) { - uint32_t sctlr; + mmu_init(); + + /* Map everything strongly ordered by default */ + mmu_config_range(0, 4096, DCACHE_OFF); + + mmu_config_range(SRAM_START, SRAM_END - SRAM_START, + DCACHE_WRITEBACK); + + mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); - /* enable dcache */ - sctlr = read_sctlr(); - sctlr |= SCTLR_C; - write_sctlr(sctlr); + dcache_mmu_enable(); } diff --git a/src/soc/ti/am335x/bootblock_media.c b/src/soc/ti/am335x/bootblock_media.c index 1c65c3868436..b7e49a6c47a6 100644 --- a/src/soc/ti/am335x/bootblock_media.c +++ b/src/soc/ti/am335x/bootblock_media.c @@ -3,7 +3,6 @@ #include <boot_device.h> #include <symbols.h> -/* FIXME: No idea how big the internal SRAM actually is. */ static const struct mem_region_device boot_dev = MEM_REGION_DEV_RO_INIT(_sram, CONFIG_ROM_SIZE); diff --git a/src/soc/ti/am335x/memlayout.ld b/src/soc/ti/am335x/memlayout.ld index 991e4012a4a7..720da26d6fd2 100644 --- a/src/soc/ti/am335x/memlayout.ld +++ b/src/soc/ti/am335x/memlayout.ld @@ -8,17 +8,16 @@ SECTIONS { SRAM_START(0x402f0400) BOOTBLOCK(0x402f0400, 20K) - ROMSTAGE(0x402f5400, 88K) - FMAP_CACHE(0x4030b400, 2K) + FMAP_CACHE(0x402f0400+20K, 2K) + TTB(0x402F8000, 16K) + ROMSTAGE(0x402F8000+16K, 40K) + STACK(0x4030be00, 4K) SRAM_END(0x40310000) DRAM_START(0x80000000) RAMSTAGE(0x80200000, 192K) - /* TODO: Implement MMU support and move TTB to a better location. */ - TTB(0x81000000, 16K) - #ifdef OMAP_HEADER .header : { *(.header); |