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authorKane Chen <kane.chen@intel.corp-partner.google.com>2021-11-23 14:42:48 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-11-25 10:43:48 +0000
commit0e9a616c2935bf5a8559a8ddf2356e940b62a8e9 (patch)
tree44958da27c0b03243c546a174df2e8247ea47296 /src/soc
parent8815409ec380e5811529b5aeb57a430eb1917936 (diff)
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soc/intel/adl: Modify SOC_INTEL_ALDERLAKE_DEBUG_CONSENT default value
On ADL, we actually use debug consent 2 for soc debug by DBC Change-Id: Ie6fbf3cdcf5dcd1a11a895ea83f55157a2ac4eb9 Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59562 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/Kconfig7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 2cbff0010dfd..e5d6d6b9992e 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -289,7 +289,7 @@ config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT
int "Debug Consent for ADL"
# USB DBC is more common for developers so make this default to 3 if
# SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
+ default 2 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
@@ -297,9 +297,8 @@ config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT
PlatformDebugConsent in FspmUpd.h has the details.
Desired platform debug type are
- 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
- 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
- 6:Enable (2-wire DCI OOB), 7:Manual
+ 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power),
+ 7:Manual
config DATA_BUS_WIDTH
int