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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-18 10:55:06 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-19 04:00:08 +0100 |
commit | 1e60839be09ee25acea3cf94f5954907c71bb0ad (patch) | |
tree | d371e45bf8e46076193a1a04c7ce42ef5f23bd61 /src/soc | |
parent | 8135dba368333e9112c9610f75427df23bbea8a4 (diff) | |
download | coreboot-1e60839be09ee25acea3cf94f5954907c71bb0ad.tar.gz coreboot-1e60839be09ee25acea3cf94f5954907c71bb0ad.tar.bz2 coreboot-1e60839be09ee25acea3cf94f5954907c71bb0ad.zip |
southbridge/amd/rs780: Remove requirement for CF8/CFC config access
The AMD RS780 early initialization code originally used the
CF8/CFC I/O method for PCI configuration space access. After
the default configuration access method was changed to MMIO
(http://review.coreboot.org/#q,aad07472), booting would hang
at "PCI: pci_scan_bus for bus 01". Fix the problem by changing
function rs780_nb_gfx_dev_table() so that it no longer borrows
the BAR3 address needed for PCIe MMIO config usage.
Change-Id: I8816b94c848e1b50f8c880e5867a96ca2a33a8a7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8394
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc')
0 files changed, 0 insertions, 0 deletions