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author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-10-22 22:07:43 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-25 20:18:40 +0000 |
commit | 2d4986c1683ca4a77a93a5ba63e481f7c5862693 (patch) | |
tree | f3e800c7aef6d64e2ffb109b96feea5ccaf714e4 /src/soc | |
parent | ac1bba8e34ea7b2c9112b19c4d7e63e74949a899 (diff) | |
download | coreboot-2d4986c1683ca4a77a93a5ba63e481f7c5862693.tar.gz coreboot-2d4986c1683ca4a77a93a5ba63e481f7c5862693.tar.bz2 coreboot-2d4986c1683ca4a77a93a5ba63e481f7c5862693.zip |
cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
All x86-based CPUs and SoCs in the coreboot tree end up including the
Makefile in cpu/x86/mtrr, so include this directly in the Makefile in
cpu/x86 to add it for all x86 CPUs/SoCs. In the unlikely case that a new
x86 CPU/SoC will be added, a CPU_X86_MTRR Kconfig option that is
selected be default could be added and the new CPU/SoC without MTRR
support can override this option that then will be used in the Makefile
to guard adding the Makefile from the cpu/x86/mtrr sub-directory.
In cpu/intel all models except model 2065X and 206AX are selcted by a
socket and rely on the socket's Makefile.inc to add x86/mtrr to the
subdirs, so those models don't add x86/mtrr themselves. The Intel
Broadwell SoC selects CPU_INTEL_HASWELL and which added x86/mtrr to the
subdirs. The Intel Xeon SP SoC directory contains two sub-folders for
different versions or generations which both add x86/mtrr to the subdirs
in their Makefiles.
Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44230
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/example/min86/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/elkhartlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/icelake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/jasperlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/quark/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/cpx/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/skx/Makefile.inc | 1 |
18 files changed, 0 insertions, 19 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 918aa8144759..5e6b2570295e 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_AMD_CEZANNE),y) subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index d873079b2c73..e95a17356545 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -4,7 +4,6 @@ ifeq ($(CONFIG_SOC_AMD_PICASSO),y) subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/cache -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index fb6e20488b6b..46e5b9d38380 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/cache -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae bootblock-y += uart.c diff --git a/src/soc/example/min86/Makefile.inc b/src/soc/example/min86/Makefile.inc index 9c1c7f0331ce..c3cc195af4b9 100644 --- a/src/soc/example/min86/Makefile.inc +++ b/src/soc/example/min86/Makefile.inc @@ -10,6 +10,4 @@ romstage-y += romstage.c ramstage-y += chip.c ramstage-y += timer.c -subdirs-y += ../../../cpu/x86/mtrr - endif diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 728c58c96729..bd554b995a92 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr # all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 49707da1a6e8..6ef79fcdc3a3 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/cache bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 5500da9e4454..33aaba0d8fd5 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 0080d72c24d3..07bd26fe2657 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 49e9f0c707d9..bc15e1f02546 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/intel/common bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index c222920d7343..d49be2410fbb 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y) subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/cache bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc index e3cf119ba514..c32ba1f245df 100644 --- a/src/soc/intel/elkhartlake/Makefile.inc +++ b/src/soc/intel/elkhartlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr # all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index a53a225b1289..847418de1c9a 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr # all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index f450257b5473..276f3c0cd549 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr # all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index c0b213eb601b..8b0c8bf88bdf 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr bootblock-y += bootblock/esram_init.S bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index c191aac607f4..775bec1ce625 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -6,7 +6,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr bootblock-y += bootblock/bootblock.c bootblock-y += i2c.c diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index bce36538ee1f..9e5a3c823175 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr # all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 2df370ae2bba..ef38ce8acc55 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -4,7 +4,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) subdirs-y += ../../../../cpu/intel/turbo subdirs-y += ../../../../cpu/x86/lapic -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/intel/microcode romstage-y += romstage.c ddr.c diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 5840580334a5..eafd8002297d 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_SKYLAKE_SP),y) subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo subdirs-y += ../../../../cpu/x86/lapic -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/cache postcar-y += soc_util.c |