diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2022-01-07 22:24:39 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-10 18:40:56 +0000 |
| commit | 3b9c3dd15016b06f2aae28285eeb9ac586fe0ce7 (patch) | |
| tree | eff5916512935757176497a0fc71c0a33ef1d214 /src/soc | |
| parent | b14e6ea0526b4d19a4c7010c8c45e49a7d57abaa (diff) | |
| download | coreboot-3b9c3dd15016b06f2aae28285eeb9ac586fe0ce7.tar.gz coreboot-3b9c3dd15016b06f2aae28285eeb9ac586fe0ce7.tar.bz2 coreboot-3b9c3dd15016b06f2aae28285eeb9ac586fe0ce7.zip | |
src/soc/amd: Remove unused <console/console.h>
Found using:
diff <(git grep -l '#include <console/console.h>' -- src/) <(git grep -l 'console_time_report\|console_time_get_and_reset\|do_putchar\|vprintk\|printk\|console_log_level\|console_init\|get_log_level\|CONSOLE_ENABLE\|get_console_loglevel\|die_notify\|die_with_post_code\|die\|arch_post_code\|mainboard_post\|post_code\|RAM_SPEW\|RAM_DEBUG\|BIOS_EMERG\|BIOS_ALERT\|BIOS_CRIT\|BIOS_ERR\|BIOS_WARNING\|BIOS_NOTICE\|BIOS_INFO\|BIOS_DEBUG\|BIOS_SPEW\|BIOS_NEVER' -- src/) |grep "<"
Change-Id: Iff7fdd679ac31a121d56746ed8efa1b3da932638
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60924
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/pci/acpi_prt.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/pci/pcie_gpp.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/pi/refcode_loader.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/agesa_acpi.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/early_fch.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/fch.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/fch.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/memmap.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/psp.c | 1 |
10 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index f06d5767e968..027a0b54bfe6 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -6,7 +6,6 @@ #include <amdblocks/lpc.h> #include <amdblocks/pmlib.h> #include <amdblocks/smbus.h> -#include <console/console.h> #include <soc/i2c.h> #include <soc/southbridge.h> #include <soc/uart.h> diff --git a/src/soc/amd/common/block/pci/acpi_prt.c b/src/soc/amd/common/block/pci/acpi_prt.c index c4c50f5b6e86..c142f575677a 100644 --- a/src/soc/amd/common/block/pci/acpi_prt.c +++ b/src/soc/amd/common/block/pci/acpi_prt.c @@ -5,7 +5,6 @@ #include <acpi/acpigen_pci.h> #include <amdblocks/amd_pci_util.h> #include <arch/ioapic.h> -#include <console/console.h> #include <device/device.h> static void acpigen_write_PRT_GSI(const struct pci_routing_info *routing_info) diff --git a/src/soc/amd/common/block/pci/pcie_gpp.c b/src/soc/amd/common/block/pci/pcie_gpp.c index a1cc3d2e8494..37a4cf5218d2 100644 --- a/src/soc/amd/common/block/pci/pcie_gpp.c +++ b/src/soc/amd/common/block/pci/pcie_gpp.c @@ -5,7 +5,6 @@ #include <acpi/acpigen_pci.h> #include <amdblocks/amd_pci_util.h> #include <assert.h> -#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/amd/common/pi/refcode_loader.c b/src/soc/amd/common/pi/refcode_loader.c index ae295633c0d5..fb62796b1317 100644 --- a/src/soc/amd/common/pi/refcode_loader.c +++ b/src/soc/amd/common/pi/refcode_loader.c @@ -2,7 +2,6 @@ #include <cbfs.h> #include <cbmem.h> -#include <console/console.h> #include <rmodule.h> #include <stage_cache.h> #include <amdblocks/agesawrapper.h> diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c index 4ab31e5229c6..f9614a2705e8 100644 --- a/src/soc/amd/picasso/agesa_acpi.c +++ b/src/soc/amd/picasso/agesa_acpi.c @@ -4,7 +4,6 @@ #include <acpi/acpi_crat.h> #include <acpi/acpi_ivrs.h> #include <arch/cpu.h> -#include <console/console.h> #include <cpu/amd/cpuid.h> #include <cpu/amd/msr.h> #include <FspGuids.h> diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index 2a1b5c971ac6..f7435aae3df8 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -7,7 +7,6 @@ #include <amdblocks/pmlib.h> #include <amdblocks/smbus.h> #include <amdblocks/spi.h> -#include <console/console.h> #include <soc/i2c.h> #include <soc/southbridge.h> #include <soc/uart.h> diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 03ba914c810b..24565a75fe24 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> #include <device/mmio.h> #include <bootstate.h> #include <cpu/amd/msr.h> diff --git a/src/soc/amd/stoneyridge/fch.c b/src/soc/amd/stoneyridge/fch.c index 3037165a5d23..e793e1b380dd 100644 --- a/src/soc/amd/stoneyridge/fch.c +++ b/src/soc/amd/stoneyridge/fch.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> #include <device/mmio.h> #include <bootstate.h> #include <cpu/x86/smm.h> diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c index 9da3e6522cf0..06f80de6661f 100644 --- a/src/soc/amd/stoneyridge/memmap.c +++ b/src/soc/amd/stoneyridge/memmap.c @@ -3,7 +3,6 @@ #include <amdblocks/smm.h> #include <assert.h> #include <stdint.h> -#include <console/console.h> #include <cpu/x86/msr.h> #include <cpu/x86/smm.h> #include <cpu/amd/msr.h> diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c index e2a74bd611ad..fc8552cebafd 100644 --- a/src/soc/amd/stoneyridge/psp.c +++ b/src/soc/amd/stoneyridge/psp.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <soc/pci_devs.h> |