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| author | Felix Singer <felixsinger@posteo.net> | 2022-03-07 04:34:52 +0100 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-03-07 08:32:09 +0000 |
| commit | 43b7f416783ccc98952a4eb5f9274907442b03e5 (patch) | |
| tree | 86a45336e809bee5d2891f2be9cf00184da9bb18 /src/soc | |
| parent | 2c423441c054d7a8c93cc814b9db5f8f7185bd0f (diff) | |
| download | coreboot-43b7f416783ccc98952a4eb5f9274907442b03e5.tar.gz coreboot-43b7f416783ccc98952a4eb5f9274907442b03e5.tar.bz2 coreboot-43b7f416783ccc98952a4eb5f9274907442b03e5.zip | |
src: Make PCI ID define names shorter
Shorten define names containing PCI_{DEVICE,VENDOR}_ID_ with
PCI_{DID,VID}_ using the commands below, which also take care of some
spacing issues. An additional clean up of pci_ids.h is done in
CB:61531.
Used commands:
* find -type f -exec sed -i 's/PCI_\([DV]\)\(EVICE\|ENDOR\)_ID_\([_0-9A-Za-z]\{2\}\([_0-9A-Za-z]\{8\}\)*[_0-9A-Za-z]\{0,5\}\)\t/PCI_\1ID_\3\t\t/g'
* find -type f -exec sed -i 's/PCI_\([DV]\)\(EVICE\|ENDOR\)_ID_\([_0-9A-Za-z]*\)/PCI_\1ID_\3/g'
Change-Id: If9027700f53b6d0d3964c26a41a1f9b8f62be178
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc')
111 files changed, 2283 insertions, 2283 deletions
diff --git a/src/soc/amd/cezanne/data_fabric.c b/src/soc/amd/cezanne/data_fabric.c index f62532c3e490..43894e98c8e6 100644 --- a/src/soc/amd/cezanne/data_fabric.c +++ b/src/soc/amd/cezanne/data_fabric.c @@ -101,29 +101,29 @@ void data_fabric_set_mmio_np(void) static const char *data_fabric_acpi_name(const struct device *dev) { switch (dev->device) { - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF0: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF0: + case PCI_DID_AMD_FAM17H_MODEL60H_DF0: + case PCI_DID_AMD_FAM19H_MODEL51H_DF0: return "DFD0"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF1: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF1: + case PCI_DID_AMD_FAM17H_MODEL60H_DF1: + case PCI_DID_AMD_FAM19H_MODEL51H_DF1: return "DFD1"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF2: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF2: + case PCI_DID_AMD_FAM17H_MODEL60H_DF2: + case PCI_DID_AMD_FAM19H_MODEL51H_DF2: return "DFD2"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF3: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF3: + case PCI_DID_AMD_FAM17H_MODEL60H_DF3: + case PCI_DID_AMD_FAM19H_MODEL51H_DF3: return "DFD3"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF4: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF4: + case PCI_DID_AMD_FAM17H_MODEL60H_DF4: + case PCI_DID_AMD_FAM19H_MODEL51H_DF4: return "DFD4"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF5: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF5: + case PCI_DID_AMD_FAM17H_MODEL60H_DF5: + case PCI_DID_AMD_FAM19H_MODEL51H_DF5: return "DFD5"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF6: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF6: + case PCI_DID_AMD_FAM17H_MODEL60H_DF6: + case PCI_DID_AMD_FAM19H_MODEL51H_DF6: return "DFD6"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF7: - case PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF7: + case PCI_DID_AMD_FAM17H_MODEL60H_DF7: + case PCI_DID_AMD_FAM19H_MODEL51H_DF7: return "DFD7"; default: printk(BIOS_ERR, "%s: Unhandled device id 0x%x\n", __func__, dev->device); @@ -141,28 +141,28 @@ static struct device_operations data_fabric_ops = { static const unsigned short pci_device_ids[] = { /* Renoir DF devices */ - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF0, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF1, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF2, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF3, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF4, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF5, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF6, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF7, + PCI_DID_AMD_FAM17H_MODEL60H_DF0, + PCI_DID_AMD_FAM17H_MODEL60H_DF1, + PCI_DID_AMD_FAM17H_MODEL60H_DF2, + PCI_DID_AMD_FAM17H_MODEL60H_DF3, + PCI_DID_AMD_FAM17H_MODEL60H_DF4, + PCI_DID_AMD_FAM17H_MODEL60H_DF5, + PCI_DID_AMD_FAM17H_MODEL60H_DF6, + PCI_DID_AMD_FAM17H_MODEL60H_DF7, /* Cezanne DF devices */ - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF0, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF1, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF2, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF3, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF4, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF5, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF6, - PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF7, + PCI_DID_AMD_FAM19H_MODEL51H_DF0, + PCI_DID_AMD_FAM19H_MODEL51H_DF1, + PCI_DID_AMD_FAM19H_MODEL51H_DF2, + PCI_DID_AMD_FAM19H_MODEL51H_DF3, + PCI_DID_AMD_FAM19H_MODEL51H_DF4, + PCI_DID_AMD_FAM19H_MODEL51H_DF5, + PCI_DID_AMD_FAM19H_MODEL51H_DF6, + PCI_DID_AMD_FAM19H_MODEL51H_DF7, 0 }; static const struct pci_driver data_fabric_driver __pci_driver = { .ops = &data_fabric_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c index 9cb668e04d77..1381df3fd6b6 100644 --- a/src/soc/amd/cezanne/root_complex.c +++ b/src/soc/amd/cezanne/root_complex.c @@ -225,6 +225,6 @@ static struct device_operations root_complex_operations = { static const struct pci_driver family17_root_complex __pci_driver = { .ops = &root_complex_operations, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB, + .vendor = PCI_VID_AMD, + .device = PCI_DID_AMD_17H_MODEL_606F_NB, }; diff --git a/src/soc/amd/common/block/acp/acp.c b/src/soc/amd/common/block/acp/acp.c index b9dfce29ced3..cf0e9f8fe29d 100644 --- a/src/soc/amd/common/block/acp/acp.c +++ b/src/soc/amd/common/block/acp/acp.c @@ -55,6 +55,6 @@ static struct device_operations acp_ops = { static const struct pci_driver acp_driver __pci_driver = { .ops = &acp_ops, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_FAM17H_ACP, + .vendor = PCI_VID_AMD, + .device = PCI_DID_AMD_FAM17H_ACP, }; diff --git a/src/soc/amd/common/block/graphics/graphics.c b/src/soc/amd/common/block/graphics/graphics.c index 38a422c6b7a6..d39f60a85c34 100644 --- a/src/soc/amd/common/block/graphics/graphics.c +++ b/src/soc/amd/common/block/graphics/graphics.c @@ -181,17 +181,17 @@ static const struct device_operations graphics_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_GPU, - PCI_DEVICE_ID_ATI_FAM17H_MODEL60H_GPU, - PCI_DEVICE_ID_ATI_FAM17H_MODEL68H_GPU, - PCI_DEVICE_ID_ATI_FAM17H_MODELA0H_GPU, - PCI_DEVICE_ID_ATI_FAM19H_MODEL51H_GPU_CEZANNE, - PCI_DEVICE_ID_ATI_FAM19H_MODEL51H_GPU_BARCELO, + PCI_DID_ATI_FAM17H_MODEL18H_GPU, + PCI_DID_ATI_FAM17H_MODEL60H_GPU, + PCI_DID_ATI_FAM17H_MODEL68H_GPU, + PCI_DID_ATI_FAM17H_MODELA0H_GPU, + PCI_DID_ATI_FAM19H_MODEL51H_GPU_CEZANNE, + PCI_DID_ATI_FAM19H_MODEL51H_GPU_BARCELO, 0, }; static const struct pci_driver graphics_driver __pci_driver = { .ops = &graphics_ops, - .vendor = PCI_VENDOR_ID_ATI, + .vendor = PCI_VID_ATI, .devices = pci_device_ids, }; diff --git a/src/soc/amd/common/block/hda/hda.c b/src/soc/amd/common/block/hda/hda.c index 104bb9bbb902..e8436ed9ce98 100644 --- a/src/soc/amd/common/block/hda/hda.c +++ b/src/soc/amd/common/block/hda/hda.c @@ -9,9 +9,9 @@ #include <device/azalia_device.h> static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_SB900_HDA, - PCI_DEVICE_ID_AMD_CZ_HDA, - PCI_DEVICE_ID_AMD_FAM17H_HDA1, + PCI_DID_AMD_SB900_HDA, + PCI_DID_AMD_CZ_HDA, + PCI_DID_AMD_FAM17H_HDA1, 0 }; @@ -42,6 +42,6 @@ static struct device_operations hda_audio_ops = { static const struct pci_driver hdaaudio_driver __pci_driver = { .ops = CONFIG(AZALIA_PLUGIN_SUPPORT) ? &default_azalia_audio_ops : &hda_audio_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/common/block/iommu/iommu.c b/src/soc/amd/common/block/iommu/iommu.c index 9d4f38e8d96a..4f20dd4117b1 100644 --- a/src/soc/amd/common/block/iommu/iommu.c +++ b/src/soc/amd/common/block/iommu/iommu.c @@ -39,16 +39,16 @@ static struct device_operations iommu_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU, - PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU, - PCI_DEVICE_ID_AMD_17H_MODEL_1020_NB_IOMMU, - PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB_IOMMU, - PCI_DEVICE_ID_AMD_17H_MODEL_A0AF_NB_IOMMU, + PCI_DID_AMD_15H_MODEL_303F_NB_IOMMU, + PCI_DID_AMD_15H_MODEL_707F_NB_IOMMU, + PCI_DID_AMD_17H_MODEL_1020_NB_IOMMU, + PCI_DID_AMD_17H_MODEL_606F_NB_IOMMU, + PCI_DID_AMD_17H_MODEL_A0AF_NB_IOMMU, 0 }; static const struct pci_driver iommu_driver __pci_driver = { .ops = &iommu_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c index ebded6b87ad9..ee8f7e48143b 100644 --- a/src/soc/amd/common/block/lpc/lpc.c +++ b/src/soc/amd/common/block/lpc/lpc.c @@ -323,13 +323,13 @@ static struct device_operations lpc_ops = { static const unsigned short pci_device_ids[] = { /* PCI device ID is used on all discrete FCHs and Family 16h Models 00h-3Fh */ - PCI_DEVICE_ID_AMD_SB900_LPC, + PCI_DID_AMD_SB900_LPC, /* PCI device ID is used on all integrated FCHs except Family 16h Models 00h-3Fh */ - PCI_DEVICE_ID_AMD_CZ_LPC, + PCI_DID_AMD_CZ_LPC, 0 }; static const struct pci_driver lpc_driver __pci_driver = { .ops = &lpc_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/common/block/pci/pcie_gpp.c b/src/soc/amd/common/block/pci/pcie_gpp.c index d48d49ce8205..2e37935da4e2 100644 --- a/src/soc/amd/common/block/pci/pcie_gpp.c +++ b/src/soc/amd/common/block/pci/pcie_gpp.c @@ -59,16 +59,16 @@ static struct device_operations internal_pcie_gpp_ops = { }; static const unsigned short internal_pci_gpp_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSA, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSB, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_PCIE_GPP_BUSABC, + PCI_DID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSA, + PCI_DID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSB, + PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC, + PCI_DID_AMD_FAM17H_MODELA0H_PCIE_GPP_BUSABC, 0 }; static const struct pci_driver internal_pcie_gpp_driver __pci_driver = { .ops = &internal_pcie_gpp_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = internal_pci_gpp_ids, }; @@ -83,15 +83,15 @@ static struct device_operations external_pcie_gpp_ops = { }; static const unsigned short external_pci_gpp_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1, - PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_PCIE_GPP, + PCI_DID_AMD_FAM17H_MODEL18H_PCIE_GPP, + PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1, + PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2, + PCI_DID_AMD_FAM17H_MODELA0H_PCIE_GPP, 0 }; static const struct pci_driver external_pcie_gpp_driver __pci_driver = { .ops = &external_pcie_gpp_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = external_pci_gpp_ids, }; diff --git a/src/soc/amd/common/block/sata/sata.c b/src/soc/amd/common/block/sata/sata.c index 9caec89998b7..19a7d3edd5d5 100644 --- a/src/soc/amd/common/block/sata/sata.c +++ b/src/soc/amd/common/block/sata/sata.c @@ -22,17 +22,17 @@ static struct device_operations sata_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_CZ_SATA, - PCI_DEVICE_ID_AMD_CZ_SATA_AHCI, - PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_VER0, - PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_VER1, - PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_RAID_VER0, - PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_RAID_VER1, + PCI_DID_AMD_CZ_SATA, + PCI_DID_AMD_CZ_SATA_AHCI, + PCI_DID_AMD_FAM17H_SATA_AHCI_VER0, + PCI_DID_AMD_FAM17H_SATA_AHCI_VER1, + PCI_DID_AMD_FAM17H_SATA_AHCI_RAID_VER0, + PCI_DID_AMD_FAM17H_SATA_AHCI_RAID_VER1, 0 }; static const struct pci_driver sata0_driver __pci_driver = { .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c index ae2edc150613..e8b7c0fce630 100644 --- a/src/soc/amd/common/block/smbus/sm.c +++ b/src/soc/amd/common/block/smbus/sm.c @@ -88,7 +88,7 @@ static struct device_operations smbus_ops = { static const struct pci_driver smbus_driver __pci_driver = { .ops = &smbus_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, /* PCI device ID is used on all integrated FCHs except Family 16h Models 00h-3Fh */ - .device = PCI_DEVICE_ID_AMD_CZ_SMBUS, + .device = PCI_DID_AMD_CZ_SMBUS, }; diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c index 75d72e9fe807..50f75bc46acc 100644 --- a/src/soc/amd/picasso/data_fabric.c +++ b/src/soc/amd/picasso/data_fabric.c @@ -101,21 +101,21 @@ void data_fabric_set_mmio_np(void) static const char *data_fabric_acpi_name(const struct device *dev) { switch (dev->device) { - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF0: + case PCI_DID_AMD_FAM17H_MODEL18H_DF0: return "DFD0"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF1: + case PCI_DID_AMD_FAM17H_MODEL18H_DF1: return "DFD1"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF2: + case PCI_DID_AMD_FAM17H_MODEL18H_DF2: return "DFD2"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF3: + case PCI_DID_AMD_FAM17H_MODEL18H_DF3: return "DFD3"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF4: + case PCI_DID_AMD_FAM17H_MODEL18H_DF4: return "DFD4"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF5: + case PCI_DID_AMD_FAM17H_MODEL18H_DF5: return "DFD5"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF6: + case PCI_DID_AMD_FAM17H_MODEL18H_DF6: return "DFD6"; - case PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF7: + case PCI_DID_AMD_FAM17H_MODEL18H_DF7: return "DFD7"; default: printk(BIOS_ERR, "%s: Unhandled device id 0x%x\n", __func__, dev->device); @@ -132,19 +132,19 @@ static struct device_operations data_fabric_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF0, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF1, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF2, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF3, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF4, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF5, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF6, - PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF7, + PCI_DID_AMD_FAM17H_MODEL18H_DF0, + PCI_DID_AMD_FAM17H_MODEL18H_DF1, + PCI_DID_AMD_FAM17H_MODEL18H_DF2, + PCI_DID_AMD_FAM17H_MODEL18H_DF3, + PCI_DID_AMD_FAM17H_MODEL18H_DF4, + PCI_DID_AMD_FAM17H_MODEL18H_DF5, + PCI_DID_AMD_FAM17H_MODEL18H_DF6, + PCI_DID_AMD_FAM17H_MODEL18H_DF7, 0 }; static const struct pci_driver data_fabric_driver __pci_driver = { .ops = &data_fabric_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index d5fd10db9dbf..73a50a915ae5 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -223,6 +223,6 @@ static struct device_operations root_complex_operations = { static const struct pci_driver family17_root_complex __pci_driver = { .ops = &root_complex_operations, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_17H_MODEL_101F_NB, + .vendor = PCI_VID_AMD, + .device = PCI_DID_AMD_17H_MODEL_101F_NB, }; diff --git a/src/soc/amd/sabrina/data_fabric.c b/src/soc/amd/sabrina/data_fabric.c index 8f821c3cc235..0a399599ede8 100644 --- a/src/soc/amd/sabrina/data_fabric.c +++ b/src/soc/amd/sabrina/data_fabric.c @@ -104,21 +104,21 @@ void data_fabric_set_mmio_np(void) static const char *data_fabric_acpi_name(const struct device *dev) { switch (dev->device) { - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF0: + case PCI_DID_AMD_FAM17H_MODELA0H_DF0: return "DFD0"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF1: + case PCI_DID_AMD_FAM17H_MODELA0H_DF1: return "DFD1"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF2: + case PCI_DID_AMD_FAM17H_MODELA0H_DF2: return "DFD2"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF3: + case PCI_DID_AMD_FAM17H_MODELA0H_DF3: return "DFD3"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF4: + case PCI_DID_AMD_FAM17H_MODELA0H_DF4: return "DFD4"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF5: + case PCI_DID_AMD_FAM17H_MODELA0H_DF5: return "DFD5"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF6: + case PCI_DID_AMD_FAM17H_MODELA0H_DF6: return "DFD6"; - case PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF7: + case PCI_DID_AMD_FAM17H_MODELA0H_DF7: return "DFD7"; default: printk(BIOS_ERR, "%s: Unhandled device id 0x%x\n", __func__, dev->device); @@ -135,19 +135,19 @@ static struct device_operations data_fabric_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF0, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF1, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF2, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF3, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF4, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF5, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF6, - PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_DF7, + PCI_DID_AMD_FAM17H_MODELA0H_DF0, + PCI_DID_AMD_FAM17H_MODELA0H_DF1, + PCI_DID_AMD_FAM17H_MODELA0H_DF2, + PCI_DID_AMD_FAM17H_MODELA0H_DF3, + PCI_DID_AMD_FAM17H_MODELA0H_DF4, + PCI_DID_AMD_FAM17H_MODELA0H_DF5, + PCI_DID_AMD_FAM17H_MODELA0H_DF6, + PCI_DID_AMD_FAM17H_MODELA0H_DF7, 0 }; static const struct pci_driver data_fabric_driver __pci_driver = { .ops = &data_fabric_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/sabrina/root_complex.c index ae1b3b915ac2..8f91b2af8105 100644 --- a/src/soc/amd/sabrina/root_complex.c +++ b/src/soc/amd/sabrina/root_complex.c @@ -227,6 +227,6 @@ static struct device_operations root_complex_operations = { static const struct pci_driver family17_root_complex __pci_driver = { .ops = &root_complex_operations, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_17H_MODEL_A0AF_NB, + .vendor = PCI_VID_AMD, + .device = PCI_DID_AMD_17H_MODEL_A0AF_NB, }; diff --git a/src/soc/amd/sabrina/xhci.c b/src/soc/amd/sabrina/xhci.c index c6c0545cc923..fdd0118d7b5a 100644 --- a/src/soc/amd/sabrina/xhci.c +++ b/src/soc/amd/sabrina/xhci.c @@ -50,7 +50,7 @@ enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe) } } else if (dev->bus->dev->path.pci.devfn == PCIE_GPP_C_DEVFN) { if (dev->path.pci.devfn == XHCI2_DEVFN - && dev->device == PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI2) { + && dev->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) { *gpe = xhci_sci_sources[2].gpe; return CB_SUCCESS; } @@ -62,7 +62,7 @@ enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe) static void configure_xhci_sci(void *unused) { const struct device *xhci_2 = DEV_PTR(xhci_2); - if (xhci_2->device == PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI2) + if (xhci_2->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources)); else gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources) - 1); diff --git a/src/soc/amd/stoneyridge/include/soc/pci_devs.h b/src/soc/amd/stoneyridge/include/soc/pci_devs.h index 4e5c8fc07c9b..e639fe6e165c 100644 --- a/src/soc/amd/stoneyridge/include/soc/pci_devs.h +++ b/src/soc/amd/stoneyridge/include/soc/pci_devs.h @@ -21,8 +21,8 @@ /* * Internal Graphics * Device IDs subject to SKU/OPN variation - * GFX_DEVID for merlinfalcon PCI_DEVICE_ID_AMD_15H_MODEL_606F_GFX - * GFX_DEVID for stoneyridge PCI_DEVICE_ID_AMD_15H_MODEL_707F_GFX + * GFX_DEVID for merlinfalcon PCI_DID_AMD_15H_MODEL_606F_GFX + * GFX_DEVID for stoneyridge PCI_DID_AMD_15H_MODEL_707F_GFX */ #define GFX_DEV 0x1 #define GFX_FUNC 0 @@ -31,8 +31,8 @@ /* HD Audio 0 * Device IDs - * HDA0_DEVID PCI_DEVICE_ID_AMD_15H_MODEL_606F_HDA - * HDA0_DEVID PCI_DEVICE_ID_AMD_15H_MODEL_707F_HDA + * HDA0_DEVID PCI_DID_AMD_15H_MODEL_606F_HDA + * HDA0_DEVID PCI_DID_AMD_15H_MODEL_707F_HDA */ #define HDA0_DEV 0x1 #define HDA0_FUNC 1 @@ -89,8 +89,8 @@ /* HT Configuration * Device IDs - * HT_DEVID for merlinfalcon PCI_DEVICE_ID_AMD_15H_MODEL_606F_NB_HT - * HT_DEVID for stoneyridge PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_HT + * HT_DEVID for merlinfalcon PCI_DID_AMD_15H_MODEL_606F_NB_HT + * HT_DEVID for stoneyridge PCI_DID_AMD_15H_MODEL_707F_NB_HT */ #define HT_DEV 0x18 #define HT_FUNC 0 diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 85ef19ef4d65..2166ef477fb1 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -320,13 +320,13 @@ static struct device_operations northbridge_operations = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_15H_MODEL_606F_NB_HT, - PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_HT, + PCI_DID_AMD_15H_MODEL_606F_NB_HT, + PCI_DID_AMD_15H_MODEL_707F_NB_HT, 0 }; static const struct pci_driver family15_northbridge __pci_driver = { .ops = &northbridge_operations, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c index c83f1e15d09e..efb50cd6f70f 100644 --- a/src/soc/amd/stoneyridge/usb.c +++ b/src/soc/amd/stoneyridge/usb.c @@ -52,17 +52,17 @@ static struct device_operations usb_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_AMD_SB900_USB_18_0, - PCI_DEVICE_ID_AMD_SB900_USB_18_2, - PCI_DEVICE_ID_AMD_SB900_USB_20_5, - PCI_DEVICE_ID_AMD_CZ_USB_0, - PCI_DEVICE_ID_AMD_CZ_USB_1, - PCI_DEVICE_ID_AMD_CZ_USB3_0, + PCI_DID_AMD_SB900_USB_18_0, + PCI_DID_AMD_SB900_USB_18_2, + PCI_DID_AMD_SB900_USB_20_5, + PCI_DID_AMD_CZ_USB_0, + PCI_DID_AMD_CZ_USB_1, + PCI_DID_AMD_CZ_USB3_0, 0 }; static const struct pci_driver usb_0_driver __pci_driver = { .ops = &usb_ops, - .vendor = PCI_VENDOR_ID_AMD, + .vendor = PCI_VID_AMD, .devices = pci_device_ids, }; diff --git a/src/soc/cavium/common/pci/uart.c b/src/soc/cavium/common/pci/uart.c index 4d5f654868ee..4ee1cdfac7fa 100644 --- a/src/soc/cavium/common/pci/uart.c +++ b/src/soc/cavium/common/pci/uart.c @@ -22,7 +22,7 @@ static struct device_operations device_ops = { static const struct pci_driver soc_cavium_uart __pci_driver = { .ops = &device_ops, .vendor = PCI_VENDOR_CAVIUM, - .device = PCI_DEVICE_ID_CAVIUM_THUNDERX_UART, + .device = PCI_DID_CAVIUM_THUNDERX_UART, }; struct chip_operations soc_cavium_common_pci_ops = { diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 6b526f12efa4..3342e4b732c3 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -34,21 +34,21 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_8, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_9, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, "Alderlake-P" }, - { PCI_DEVICE_ID_INTEL_ADL_M_ID_1, "Alderlake-M" }, - { PCI_DEVICE_ID_INTEL_ADL_M_ID_2, "Alderlake-M" }, - { PCI_DEVICE_ID_INTEL_ADL_N_ID_1, "Alderlake-N" }, - { PCI_DEVICE_ID_INTEL_ADL_N_ID_2, "Alderlake-N" }, - { PCI_DEVICE_ID_INTEL_ADL_N_ID_3, "Alderlake-N" }, - { PCI_DEVICE_ID_INTEL_ADL_N_ID_4, "Alderlake-N" }, + { PCI_DID_INTEL_ADL_P_ID_1, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_3, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_4, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_5, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_6, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_7, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_8, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_9, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_P_ID_10, "Alderlake-P" }, + { PCI_DID_INTEL_ADL_M_ID_1, "Alderlake-M" }, + { PCI_DID_INTEL_ADL_M_ID_2, "Alderlake-M" }, + { PCI_DID_INTEL_ADL_N_ID_1, "Alderlake-N" }, + { PCI_DID_INTEL_ADL_N_ID_2, "Alderlake-N" }, + { PCI_DID_INTEL_ADL_N_ID_3, "Alderlake-N" }, + { PCI_DID_INTEL_ADL_N_ID_4, "Alderlake-N" }, }; @@ -56,76 +56,76 @@ static struct { u16 espiid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_0, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_1, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_2, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_3, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_4, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_5, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_6, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_7, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_8, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_9, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_10, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_11, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_12, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_13, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_14, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_15, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_16, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_17, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_18, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_19, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_20, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_21, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_22, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_23, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_24, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_25, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_26, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_27, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_28, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33, "Alderlake-P SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_M_ESPI_32, "Alderlake-M SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_1, "Alderlake-N SKU" }, - { PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_2, "Alderlake-N SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_0, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_1, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_2, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_3, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_4, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_5, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_6, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_7, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_8, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_9, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_10, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_11, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_12, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_13, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_14, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_15, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_16, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_17, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_18, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_19, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_20, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_21, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_22, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_23, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_24, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_25, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_26, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_27, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_28, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_P_ESPI_33, "Alderlake-P SKU" }, + { PCI_DID_INTEL_ADP_M_ESPI_32, "Alderlake-M SKU" }, + { PCI_DID_INTEL_ADP_M_N_ESPI_1, "Alderlake-N SKU" }, + { PCI_DID_INTEL_ADP_M_N_ESPI_2, "Alderlake-N SKU" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_ADL_GT0, "Alderlake GT0" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_1, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_2, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_3, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_4, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_5, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_6, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_7, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_8, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_GT1_9, "Alderlake GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_7, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_8, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_P_GT2_9, "Alderlake P GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_M_GT3, "Alderlake M GT3" }, - { PCI_DEVICE_ID_INTEL_ADL_N_GT1, "Alderlake N GT1" }, - { PCI_DEVICE_ID_INTEL_ADL_N_GT2, "Alderlake N GT2" }, - { PCI_DEVICE_ID_INTEL_ADL_N_GT3, "Alderlake N GT3" }, + { PCI_DID_INTEL_ADL_GT0, "Alderlake GT0" }, + { PCI_DID_INTEL_ADL_GT1, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_1, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_2, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_3, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_4, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_5, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_6, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_7, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_8, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_GT1_9, "Alderlake GT1" }, + { PCI_DID_INTEL_ADL_P_GT2, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_7, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_8, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_P_GT2_9, "Alderlake P GT2" }, + { PCI_DID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, + { PCI_DID_INTEL_ADL_M_GT2, "Alderlake M GT2" }, + { PCI_DID_INTEL_ADL_M_GT3, "Alderlake M GT3" }, + { PCI_DID_INTEL_ADL_N_GT1, "Alderlake N GT1" }, + { PCI_DID_INTEL_ADL_N_GT2, "Alderlake N GT2" }, + { PCI_DID_INTEL_ADL_N_GT3, "Alderlake N GT3" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index aad45df3cffb..67664061c884 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -48,19 +48,19 @@ static const struct { enum soc_intel_alderlake_power_limits limits; enum soc_intel_alderlake_cpu_tdps cpu_tdp; } cpuid_to_adl[] = { - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, ADL_P_142_242_282_15W_CORE, TDP_15W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, ADL_P_142_242_282_15W_CORE, TDP_15W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, ADL_P_142_242_282_15W_CORE, TDP_15W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, ADL_P_282_482_28W_CORE, TDP_28W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, ADL_P_282_482_28W_CORE, TDP_28W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_28W_CORE, TDP_28W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, ADL_P_442_482_45W_CORE, TDP_45W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, ADL_P_642_682_45W_CORE, TDP_45W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_642_682_45W_CORE, TDP_45W }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, ADL_P_442_482_45W_CORE, TDP_45W }, - { PCI_DEVICE_ID_INTEL_ADL_M_ID_1, ADL_M_282_12W_CORE, TDP_12W }, - { PCI_DEVICE_ID_INTEL_ADL_M_ID_1, ADL_M_282_15W_CORE, TDP_15W }, - { PCI_DEVICE_ID_INTEL_ADL_M_ID_2, ADL_M_242_CORE, TDP_9W }, + { PCI_DID_INTEL_ADL_P_ID_10, ADL_P_142_242_282_15W_CORE, TDP_15W }, + { PCI_DID_INTEL_ADL_P_ID_7, ADL_P_142_242_282_15W_CORE, TDP_15W }, + { PCI_DID_INTEL_ADL_P_ID_6, ADL_P_142_242_282_15W_CORE, TDP_15W }, + { PCI_DID_INTEL_ADL_P_ID_7, ADL_P_282_482_28W_CORE, TDP_28W }, + { PCI_DID_INTEL_ADL_P_ID_5, ADL_P_282_482_28W_CORE, TDP_28W }, + { PCI_DID_INTEL_ADL_P_ID_3, ADL_P_682_28W_CORE, TDP_28W }, + { PCI_DID_INTEL_ADL_P_ID_5, ADL_P_442_482_45W_CORE, TDP_45W }, + { PCI_DID_INTEL_ADL_P_ID_4, ADL_P_642_682_45W_CORE, TDP_45W }, + { PCI_DID_INTEL_ADL_P_ID_3, ADL_P_642_682_45W_CORE, TDP_45W }, + { PCI_DID_INTEL_ADL_P_ID_1, ADL_P_442_482_45W_CORE, TDP_45W }, + { PCI_DID_INTEL_ADL_M_ID_1, ADL_M_282_12W_CORE, TDP_12W }, + { PCI_DID_INTEL_ADL_M_ID_1, ADL_M_282_15W_CORE, TDP_15W }, + { PCI_DID_INTEL_ADL_M_ID_2, ADL_M_242_CORE, TDP_9W }, }; /* Types of display ports */ diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 426f6216b63c..66db16b6ed1d 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -174,43 +174,43 @@ void soc_init_cpus(struct bus *cpu_bus) enum adl_cpu_type get_adl_cpu_type(void) { const uint16_t adl_m_mch_ids[] = { - PCI_DEVICE_ID_INTEL_ADL_M_ID_1, - PCI_DEVICE_ID_INTEL_ADL_M_ID_2, + PCI_DID_INTEL_ADL_M_ID_1, + PCI_DID_INTEL_ADL_M_ID_2, }; const uint16_t adl_p_mch_ids[] = { - PCI_DEVICE_ID_INTEL_ADL_P_ID_1, - PCI_DEVICE_ID_INTEL_ADL_P_ID_3, - PCI_DEVICE_ID_INTEL_ADL_P_ID_4, - PCI_DEVICE_ID_INTEL_ADL_P_ID_5, - PCI_DEVICE_ID_INTEL_ADL_P_ID_6, - PCI_DEVICE_ID_INTEL_ADL_P_ID_7, - PCI_DEVICE_ID_INTEL_ADL_P_ID_8, - PCI_DEVICE_ID_INTEL_ADL_P_ID_9, - PCI_DEVICE_ID_INTEL_ADL_P_ID_10 + PCI_DID_INTEL_ADL_P_ID_1, + PCI_DID_INTEL_ADL_P_ID_3, + PCI_DID_INTEL_ADL_P_ID_4, + PCI_DID_INTEL_ADL_P_ID_5, + PCI_DID_INTEL_ADL_P_ID_6, + PCI_DID_INTEL_ADL_P_ID_7, + PCI_DID_INTEL_ADL_P_ID_8, + PCI_DID_INTEL_ADL_P_ID_9, + PCI_DID_INTEL_ADL_P_ID_10 }; const uint16_t adl_s_mch_ids[] = { - PCI_DEVICE_ID_INTEL_ADL_S_ID_1, - PCI_DEVICE_ID_INTEL_ADL_S_ID_2, - PCI_DEVICE_ID_INTEL_ADL_S_ID_3, - PCI_DEVICE_ID_INTEL_ADL_S_ID_4, - PCI_DEVICE_ID_INTEL_ADL_S_ID_5, - PCI_DEVICE_ID_INTEL_ADL_S_ID_6, - PCI_DEVICE_ID_INTEL_ADL_S_ID_7, - PCI_DEVICE_ID_INTEL_ADL_S_ID_8, - PCI_DEVICE_ID_INTEL_ADL_S_ID_9, - PCI_DEVICE_ID_INTEL_ADL_S_ID_10, - PCI_DEVICE_ID_INTEL_ADL_S_ID_11, - PCI_DEVICE_ID_INTEL_ADL_S_ID_12, - PCI_DEVICE_ID_INTEL_ADL_S_ID_13, - PCI_DEVICE_ID_INTEL_ADL_S_ID_14, - PCI_DEVICE_ID_INTEL_ADL_S_ID_15, + PCI_DID_INTEL_ADL_S_ID_1, + PCI_DID_INTEL_ADL_S_ID_2, + PCI_DID_INTEL_ADL_S_ID_3, + PCI_DID_INTEL_ADL_S_ID_4, + PCI_DID_INTEL_ADL_S_ID_5, + PCI_DID_INTEL_ADL_S_ID_6, + PCI_DID_INTEL_ADL_S_ID_7, + PCI_DID_INTEL_ADL_S_ID_8, + PCI_DID_INTEL_ADL_S_ID_9, + PCI_DID_INTEL_ADL_S_ID_10, + PCI_DID_INTEL_ADL_S_ID_11, + PCI_DID_INTEL_ADL_S_ID_12, + PCI_DID_INTEL_ADL_S_ID_13, + PCI_DID_INTEL_ADL_S_ID_14, + PCI_DID_INTEL_ADL_S_ID_15, }; const uint16_t adl_n_mch_ids[] = { - PCI_DEVICE_ID_INTEL_ADL_N_ID_1, - PCI_DEVICE_ID_INTEL_ADL_N_ID_2, - PCI_DEVICE_ID_INTEL_ADL_N_ID_3, - PCI_DEVICE_ID_INTEL_ADL_N_ID_4, + PCI_DID_INTEL_ADL_N_ID_1, + PCI_DID_INTEL_ADL_N_ID_2, + PCI_DID_INTEL_ADL_N_ID_3, + PCI_DID_INTEL_ADL_N_ID_4, }; const uint16_t mchid = pci_s_read_config16(PCI_DEV(0, PCI_SLOT(SA_DEVFN_ROOT), diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index dac36934dfd3..b4e833bf55ea 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -309,17 +309,17 @@ static uint16_t get_vccin_aux_imon_iccmax(void) } switch (mch_id) { - case PCI_DEVICE_ID_INTEL_ADL_P_ID_1: - case PCI_DEVICE_ID_INTEL_ADL_P_ID_3: - case PCI_DEVICE_ID_INTEL_ADL_P_ID_5: - case PCI_DEVICE_ID_INTEL_ADL_P_ID_6: - case PCI_DEVICE_ID_INTEL_ADL_P_ID_7: + case PCI_DID_INTEL_ADL_P_ID_1: + case PCI_DID_INTEL_ADL_P_ID_3: + case PCI_DID_INTEL_ADL_P_ID_5: + case PCI_DID_INTEL_ADL_P_ID_6: + case PCI_DID_INTEL_ADL_P_ID_7: tdp = get_cpu_tdp(); if (tdp == TDP_45W) return ICC_MAX_TDP_45W; return ICC_MAX_TDP_15W_28W; - case PCI_DEVICE_ID_INTEL_ADL_M_ID_1: - case PCI_DEVICE_ID_INTEL_ADL_M_ID_2: + case PCI_DID_INTEL_ADL_M_ID_1: + case PCI_DID_INTEL_ADL_M_ID_2: return ICC_MAX_ID_ADL_M_MA; default: printk(BIOS_ERR, "Unknown MCH ID: 0x%4x, skipping VccInAuxImonIccMax config\n", diff --git a/src/soc/intel/alderlake/vr_config.c b/src/soc/intel/alderlake/vr_config.c index c0058cdba68e..58c77f76d11f 100644 --- a/src/soc/intel/alderlake/vr_config.c +++ b/src/soc/intel/alderlake/vr_config.c @@ -59,55 +59,55 @@ static uint32_t load_table(const struct vr_lookup *tbl, const int tbl_entries, c /* Per the power map from #613643, update ADL-P 6+8+2 (28W) VR configuration */ static const struct vr_lookup vr_config_ll[] = { - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) }, + { PCI_DID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) }, }; static const struct vr_lookup vr_config_icc[] = { - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_ICC(120, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_ICC(120, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_ICC(109, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_ICC(85, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_ICC(85, 55) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) }, + { PCI_DID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_ICC(120, 55) }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) }, + { PCI_DID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_ICC(160, 55) }, + { PCI_DID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_ICC(120, 55) }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_ICC(109, 55) }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_ICC(85, 55) }, + { PCI_DID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_ICC(85, 55) }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) }, + { PCI_DID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_ICC(80, 40) }, }; static const struct vr_lookup vr_config_tdc_timewindow[] = { - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, + { PCI_DID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) }, }; static const struct vr_lookup vr_config_tdc_currentlimit[] = { - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(47, 47) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(57, 57) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(57, 57) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(47, 47) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_TDC_CURRENT(40, 40) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_TDC_CURRENT(32, 32) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_TDC_CURRENT(32, 32) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) }, + { PCI_DID_INTEL_ADL_P_ID_1, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(47, 47) }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(57, 57) }, + { PCI_DID_INTEL_ADL_P_ID_4, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(57, 57) }, + { PCI_DID_INTEL_ADL_P_ID_5, 45, VR_CFG_ALL_DOMAINS_TDC_CURRENT(47, 47) }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, VR_CFG_ALL_DOMAINS_TDC_CURRENT(40, 40) }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, VR_CFG_ALL_DOMAINS_TDC_CURRENT(32, 32) }, + { PCI_DID_INTEL_ADL_P_ID_7, 28, VR_CFG_ALL_DOMAINS_TDC_CURRENT(32, 32) }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) }, + { PCI_DID_INTEL_ADL_P_ID_10, 15, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) }, }; void fill_vr_domain_config(FSP_S_CONFIG *s_cfg, diff --git a/src/soc/intel/apollolake/report_platform.c b/src/soc/intel/apollolake/report_platform.c index 25587eb9d8a3..31a6458d476c 100644 --- a/src/soc/intel/apollolake/report_platform.c +++ b/src/soc/intel/apollolake/report_platform.c @@ -28,27 +28,27 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_GLK_NB, "Geminilake" }, - { PCI_DEVICE_ID_INTEL_APL_NB, "Apollolake" }, + { PCI_DID_INTEL_GLK_NB, "Geminilake" }, + { PCI_DID_INTEL_APL_NB, "Apollolake" }, }; static struct { u16 lpcid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_APL_LPC, "Apollolake" }, - { PCI_DEVICE_ID_INTEL_GLK_LPC, "Geminilake" }, - { PCI_DEVICE_ID_INTEL_GLK_ESPI, "Geminilake" }, + { PCI_DID_INTEL_APL_LPC, "Apollolake" }, + { PCI_DID_INTEL_GLK_LPC, "Geminilake" }, + { PCI_DID_INTEL_GLK_ESPI, "Geminilake" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_APL_IGD_HD_505, "Apollolake HD 505" }, - { PCI_DEVICE_ID_INTEL_APL_IGD_HD_500, "Apollolake HD 500" }, - { PCI_DEVICE_ID_INTEL_GLK_IGD, "Geminilake" }, - { PCI_DEVICE_ID_INTEL_GLK_IGD_EU12, "Geminilake EU12" }, + { PCI_DID_INTEL_APL_IGD_HD_505, "Apollolake HD 505" }, + { PCI_DID_INTEL_APL_IGD_HD_500, "Apollolake HD 500" }, + { PCI_DID_INTEL_GLK_IGD, "Geminilake" }, + { PCI_DID_INTEL_GLK_IGD_EU12, "Geminilake EU12" }, }; static uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/baytrail/ehci.c b/src/soc/intel/baytrail/ehci.c index 5ae834efdd88..b084b0a14fb5 100644 --- a/src/soc/intel/baytrail/ehci.c +++ b/src/soc/intel/baytrail/ehci.c @@ -158,6 +158,6 @@ static struct device_operations ehci_device_ops = { static const struct pci_driver baytrail_ehci __pci_driver = { .ops = &ehci_device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = EHCI_DEVID }; diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c index e672b58bfe26..3bfad01f4b27 100644 --- a/src/soc/intel/baytrail/emmc.c +++ b/src/soc/intel/baytrail/emmc.c @@ -51,6 +51,6 @@ static struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = MMC45_DEVID, }; diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 2ee2375ef6c4..102716838f21 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -387,6 +387,6 @@ static struct device_operations gfx_device_ops = { static const struct pci_driver gfx_driver __pci_driver = { .ops = &gfx_device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = GFX_DEVID, }; diff --git a/src/soc/intel/baytrail/hda.c b/src/soc/intel/baytrail/hda.c index b582006d1c8b..6bebf0546750 100644 --- a/src/soc/intel/baytrail/hda.c +++ b/src/soc/intel/baytrail/hda.c @@ -93,6 +93,6 @@ static const struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = HDA_DEVID, }; diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c index 719286541b28..03ac736793b8 100644 --- a/src/soc/intel/baytrail/lpe.c +++ b/src/soc/intel/baytrail/lpe.c @@ -162,6 +162,6 @@ static const struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = LPE_DEVID, }; diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c index b63576b784db..fa1b957ba122 100644 --- a/src/soc/intel/baytrail/lpss.c +++ b/src/soc/intel/baytrail/lpss.c @@ -177,6 +177,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c index e8f97681a444..cd8c6d4fd757 100644 --- a/src/soc/intel/baytrail/northcluster.c +++ b/src/soc/intel/baytrail/northcluster.c @@ -137,6 +137,6 @@ static struct device_operations nc_ops = { static const struct pci_driver nc_driver __pci_driver = { .ops = &nc_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = SOC_DEVID, }; diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c index c257ce0f3e61..de3f0c5b9b0a 100644 --- a/src/soc/intel/baytrail/pcie.c +++ b/src/soc/intel/baytrail/pcie.c @@ -244,6 +244,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pcie_root_ports __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/baytrail/sata.c b/src/soc/intel/baytrail/sata.c index 5e5215b24980..5c81544a15fa 100644 --- a/src/soc/intel/baytrail/sata.c +++ b/src/soc/intel/baytrail/sata.c @@ -209,6 +209,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver baytrail_sata __pci_driver = { .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c index 0a015c8667e0..920a96004eb0 100644 --- a/src/soc/intel/baytrail/sd.c +++ b/src/soc/intel/baytrail/sd.c @@ -41,6 +41,6 @@ static const struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = SD_DEVID, }; diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 033cd47580af..8356e5d641c7 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -491,7 +491,7 @@ static struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = LPC_DEVID, }; diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c index 9ff30e3d59f1..99b091c0bbb6 100644 --- a/src/soc/intel/baytrail/xhci.c +++ b/src/soc/intel/baytrail/xhci.c @@ -238,6 +238,6 @@ static struct device_operations xhci_device_ops = { static const struct pci_driver baytrail_xhci __pci_driver = { .ops = &xhci_device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = XHCI_DEVID }; diff --git a/src/soc/intel/braswell/emmc.c b/src/soc/intel/braswell/emmc.c index d3c5aa86409b..715444f295af 100644 --- a/src/soc/intel/braswell/emmc.c +++ b/src/soc/intel/braswell/emmc.c @@ -39,6 +39,6 @@ static struct device_operations emmc_device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &emmc_device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = MMC_DEVID, }; diff --git a/src/soc/intel/braswell/gfx.c b/src/soc/intel/braswell/gfx.c index 7599329b6199..549fe1c4ac42 100644 --- a/src/soc/intel/braswell/gfx.c +++ b/src/soc/intel/braswell/gfx.c @@ -77,6 +77,6 @@ static struct device_operations gfx_device_ops = { static const struct pci_driver gfx_driver __pci_driver = { .ops = &gfx_device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = GFX_DEVID, }; diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c index 323c9fc1755c..109ad847724b 100644 --- a/src/soc/intel/braswell/lpe.c +++ b/src/soc/intel/braswell/lpe.c @@ -179,6 +179,6 @@ static const struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = LPE_DEVID, }; diff --git a/src/soc/intel/braswell/lpss.c b/src/soc/intel/braswell/lpss.c index 5f93e1720675..b4085a0d3e87 100644 --- a/src/soc/intel/braswell/lpss.c +++ b/src/soc/intel/braswell/lpss.c @@ -164,6 +164,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c index 76d532b5cb68..d9a516d57df8 100644 --- a/src/soc/intel/braswell/northcluster.c +++ b/src/soc/intel/braswell/northcluster.c @@ -163,6 +163,6 @@ static struct device_operations nc_ops = { static const struct pci_driver nc_driver __pci_driver = { .ops = &nc_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = SOC_DEVID, }; diff --git a/src/soc/intel/braswell/pcie.c b/src/soc/intel/braswell/pcie.c index 6a719e78a935..762dfd4a334d 100644 --- a/src/soc/intel/braswell/pcie.c +++ b/src/soc/intel/braswell/pcie.c @@ -151,6 +151,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pcie_root_ports __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/braswell/sata.c b/src/soc/intel/braswell/sata.c index d88ee57fb520..1c06cae63074 100644 --- a/src/soc/intel/braswell/sata.c +++ b/src/soc/intel/braswell/sata.c @@ -36,6 +36,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver soc_sata __pci_driver = { .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/braswell/sd.c b/src/soc/intel/braswell/sd.c index 39a44db7729f..12e77c9230e1 100644 --- a/src/soc/intel/braswell/sd.c +++ b/src/soc/intel/braswell/sd.c @@ -41,6 +41,6 @@ static const struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = SD_DEVID, }; diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index 4c6cbee3431c..c058850c5e66 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -539,7 +539,7 @@ static struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = LPC_DEVID, }; diff --git a/src/soc/intel/braswell/xhci.c b/src/soc/intel/braswell/xhci.c index f84c2044996e..24d2955b8982 100644 --- a/src/soc/intel/braswell/xhci.c +++ b/src/soc/intel/braswell/xhci.c @@ -39,6 +39,6 @@ static struct device_operations xhci_device_ops = { static const struct pci_driver soc_xhci __pci_driver = { .ops = &xhci_device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = XHCI_DEVID }; diff --git a/src/soc/intel/broadwell/gma.c b/src/soc/intel/broadwell/gma.c index e84d075391a7..e50ff0cd81a4 100644 --- a/src/soc/intel/broadwell/gma.c +++ b/src/soc/intel/broadwell/gma.c @@ -604,6 +604,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver igd_driver __pci_driver = { .ops = &igd_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c index 396c2838451d..ee635019d59c 100644 --- a/src/soc/intel/broadwell/minihd.c +++ b/src/soc/intel/broadwell/minihd.c @@ -106,6 +106,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver minihd_driver __pci_driver = { .ops = &minihd_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/northbridge.c b/src/soc/intel/broadwell/northbridge.c index 4511c0750272..a29a4f41ca95 100644 --- a/src/soc/intel/broadwell/northbridge.c +++ b/src/soc/intel/broadwell/northbridge.c @@ -420,7 +420,7 @@ static const unsigned short systemagent_ids[] = { static const struct pci_driver systemagent_driver __pci_driver = { .ops = &systemagent_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = systemagent_ids }; diff --git a/src/soc/intel/broadwell/pch/adsp.c b/src/soc/intel/broadwell/pch/adsp.c index e154446aafea..7da807a6fd2e 100644 --- a/src/soc/intel/broadwell/pch/adsp.c +++ b/src/soc/intel/broadwell/pch/adsp.c @@ -132,6 +132,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_adsp __pci_driver = { .ops = &adsp_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/hda.c b/src/soc/intel/broadwell/pch/hda.c index c292b942e018..ad3d8e920034 100644 --- a/src/soc/intel/broadwell/pch/hda.c +++ b/src/soc/intel/broadwell/pch/hda.c @@ -136,6 +136,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_hda __pci_driver = { .ops = &hda_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c index b68a8cfb68fc..45669b398733 100644 --- a/src/soc/intel/broadwell/pch/lpc.c +++ b/src/soc/intel/broadwell/pch/lpc.c @@ -627,6 +627,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_lpc __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/me.c b/src/soc/intel/broadwell/pch/me.c index 95b6d889d224..4650a224eb39 100644 --- a/src/soc/intel/broadwell/pch/me.c +++ b/src/soc/intel/broadwell/pch/me.c @@ -1047,6 +1047,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver intel_me __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/pcie.c b/src/soc/intel/broadwell/pch/pcie.c index 5997768730f8..b37f256069e8 100644 --- a/src/soc/intel/broadwell/pch/pcie.c +++ b/src/soc/intel/broadwell/pch/pcie.c @@ -641,6 +641,6 @@ static const unsigned short pcie_device_ids[] = { static const struct pci_driver pch_pcie __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pcie_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/sata.c b/src/soc/intel/broadwell/pch/sata.c index 83437758881f..9f929a48090c 100644 --- a/src/soc/intel/broadwell/pch/sata.c +++ b/src/soc/intel/broadwell/pch/sata.c @@ -279,6 +279,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_sata __pci_driver = { .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/serialio.c b/src/soc/intel/broadwell/pch/serialio.c index f87217c070d2..336b501b32c7 100644 --- a/src/soc/intel/broadwell/pch/serialio.c +++ b/src/soc/intel/broadwell/pch/serialio.c @@ -285,6 +285,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_pcie __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/usb_ehci.c b/src/soc/intel/broadwell/pch/usb_ehci.c index 5b977dd3c633..3ada5b26b147 100644 --- a/src/soc/intel/broadwell/pch/usb_ehci.c +++ b/src/soc/intel/broadwell/pch/usb_ehci.c @@ -52,6 +52,6 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_usb_ehci __pci_driver = { .ops = &usb_ehci_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/broadwell/pch/usb_xhci.c b/src/soc/intel/broadwell/pch/usb_xhci.c index b766425df446..e3bb40f08168 100644 --- a/src/soc/intel/broadwell/pch/usb_xhci.c +++ b/src/soc/intel/broadwell/pch/usb_xhci.c @@ -212,7 +212,7 @@ static const unsigned short pci_device_ids[] = { static const struct pci_driver pch_usb_xhci __pci_driver = { .ops = &usb_xhci_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; #endif /* !__SIMPLE_DEVICE__ */ diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index fed8ac219922..578cbbf9771f 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -40,119 +40,119 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" }, - { PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_U, "Coffeelake U (4+3e)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_U_2, "Coffeelake U (2)" }, - { PCI_DEVICE_ID_INTEL_WHL_ID_W_4, "Whiskeylake W (4+2)" }, - { PCI_DEVICE_ID_INTEL_WHL_ID_W_2, "Whiskeylake W (2+2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_H, "Coffeelake-H" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_H_4, "Coffeelake-H (4)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_H_8, "Coffeelake-H (8+2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S, "Coffeelake-S" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2, "Coffeelake-S DT(2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4, "Coffeelake-S DT(4)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8, "Coffeelake-S DT(8+2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4, "Coffeelake-S WS(4+2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6, "Coffeelake-S WS(6+2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8, "Coffeelake-S WS(8+2)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4, "Coffeelake-S S(4)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6, "Coffeelake-S S(6)" }, - { PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8, "Coffeelake-S S(8)" }, - { PCI_DEVICE_ID_INTEL_CML_ULT, "CometLake-U (4+2)" }, - { PCI_DEVICE_ID_INTEL_CML_ULT_2_2, "CometLake-U (2+2)" }, - { PCI_DEVICE_ID_INTEL_CML_ULT_6_2, "CometLake-U (6+2)" }, - { PCI_DEVICE_ID_INTEL_CML_ULX, "CometLake-ULX (4+2)" }, - { PCI_DEVICE_ID_INTEL_CML_S, "CometLake-S (6+2)" }, - { PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2, "CometLake-S G0/G1/P0/P1 (6+2)" }, - { PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, "CometLake-S P0/P1 (8+2)" }, - { PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, "CometLake-S P0/P1 (10+2)" }, - { PCI_DEVICE_ID_INTEL_CML_S_G0G1_4, "CometLake-S G0/G1 (4+2)" }, - { PCI_DEVICE_ID_INTEL_CML_S_G0G1_2, "CometLake-S G0/G1 (2+2)" }, - { PCI_DEVICE_ID_INTEL_CML_H, "CometLake-H (6+2)" }, - { PCI_DEVICE_ID_INTEL_CML_H_4_2, "CometLake-H (4+2)" }, - { PCI_DEVICE_ID_INTEL_CML_H_8_2, "CometLake-H (8+2)" }, + { PCI_DID_INTEL_CNL_ID_U, "Cannonlake-U" }, + { PCI_DID_INTEL_CNL_ID_Y, "Cannonlake-Y" }, + { PCI_DID_INTEL_CFL_ID_U, "Coffeelake U (4+3e)" }, + { PCI_DID_INTEL_CFL_ID_U_2, "Coffeelake U (2)" }, + { PCI_DID_INTEL_WHL_ID_W_4, "Whiskeylake W (4+2)" }, + { PCI_DID_INTEL_WHL_ID_W_2, "Whiskeylake W (2+2)" }, + { PCI_DID_INTEL_CFL_ID_H, "Coffeelake-H" }, + { PCI_DID_INTEL_CFL_ID_H_4, "Coffeelake-H (4)" }, + { PCI_DID_INTEL_CFL_ID_H_8, "Coffeelake-H (8+2)" }, + { PCI_DID_INTEL_CFL_ID_S, "Coffeelake-S" }, + { PCI_DID_INTEL_CFL_ID_S_DT_2, "Coffeelake-S DT(2)" }, + { PCI_DID_INTEL_CFL_ID_S_DT_4, "Coffeelake-S DT(4)" }, + { PCI_DID_INTEL_CFL_ID_S_DT_8, "Coffeelake-S DT(8+2)" }, + { PCI_DID_INTEL_CFL_ID_S_WS_4, "Coffeelake-S WS(4+2)" }, + { PCI_DID_INTEL_CFL_ID_S_WS_6, "Coffeelake-S WS(6+2)" }, + { PCI_DID_INTEL_CFL_ID_S_WS_8, "Coffeelake-S WS(8+2)" }, + { PCI_DID_INTEL_CFL_ID_S_S_4, "Coffeelake-S S(4)" }, + { PCI_DID_INTEL_CFL_ID_S_S_6, "Coffeelake-S S(6)" }, + { PCI_DID_INTEL_CFL_ID_S_S_8, "Coffeelake-S S(8)" }, + { PCI_DID_INTEL_CML_ULT, "CometLake-U (4+2)" }, + { PCI_DID_INTEL_CML_ULT_2_2, "CometLake-U (2+2)" }, + { PCI_DID_INTEL_CML_ULT_6_2, "CometLake-U (6+2)" }, + { PCI_DID_INTEL_CML_ULX, "CometLake-ULX (4+2)" }, + { PCI_DID_INTEL_CML_S, "CometLake-S (6+2)" }, + { PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2, "CometLake-S G0/G1/P0/P1 (6+2)" }, + { PCI_DID_INTEL_CML_S_P0P1_8_2, "CometLake-S P0/P1 (8+2)" }, + { PCI_DID_INTEL_CML_S_P0P1_10_2, "CometLake-S P0/P1 (10+2)" }, + { PCI_DID_INTEL_CML_S_G0G1_4, "CometLake-S G0/G1 (4+2)" }, + { PCI_DID_INTEL_CML_S_G0G1_2, "CometLake-S G0/G1 (2+2)" }, + { PCI_DID_INTEL_CML_H, "CometLake-H (6+2)" }, + { PCI_DID_INTEL_CML_H_4_2, "CometLake-H (4+2)" }, + { PCI_DID_INTEL_CML_H_8_2, "CometLake-H (8+2)" }, }; static struct { u16 lpcid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC, "Cannonlake-U Base" }, - { PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC, "Cannonlake-U Premium" }, - { PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC, "Cannonlake-Y Premium" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_H310, "Cannonlake-H H310" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_H370, "Cannonlake-H H370" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_Z390, "Cannonlake-H Z390" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370, "Cannonlake-H Q370" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_B360, "Cannonlake-H B360" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246, "Cannonlake-H C246" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_C242, "Cannonlake-H C242" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370, "Cannonlake-H QM370" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_HM370, "Cannonlake-H HM370" }, - { PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246, "Cannonlake-H CM246" }, - { PCI_DEVICE_ID_INTEL_CMP_SUPER_U_LPC, "Cometlake-U Super" }, - { PCI_DEVICE_ID_INTEL_CMP_PREMIUM_Y_LPC, "Cometlake-Y Premium" }, - { PCI_DEVICE_ID_INTEL_CMP_PREMIUM_U_LPC, "Cometlake-U Premium" }, - { PCI_DEVICE_ID_INTEL_CMP_BASE_U_LPC, "Cometlake-U Base" }, - { PCI_DEVICE_ID_INTEL_CMP_SUPER_Y_LPC, "Cometlake-Y Super" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_HM470, "Cometlake-H HM470" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_WM490, "Cometlake-H WM490" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_QM480, "Cometlake-H QM480" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_W480, "Cometlake-H W480" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_H470, "Cometlake-H H470" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_Z490, "Cometlake-H Z490" }, - { PCI_DEVICE_ID_INTEL_CMP_H_LPC_Q470, "Cometlake-H Q470" }, + { PCI_DID_INTEL_CNL_BASE_U_LPC, "Cannonlake-U Base" }, + { PCI_DID_INTEL_CNL_U_PREMIUM_LPC, "Cannonlake-U Premium" }, + { PCI_DID_INTEL_CNL_Y_PREMIUM_LPC, "Cannonlake-Y Premium" }, + { PCI_DID_INTEL_CNP_H_LPC_H310, "Cannonlake-H H310" }, + { PCI_DID_INTEL_CNP_H_LPC_H370, "Cannonlake-H H370" }, + { PCI_DID_INTEL_CNP_H_LPC_Z390, "Cannonlake-H Z390" }, + { PCI_DID_INTEL_CNP_H_LPC_Q370, "Cannonlake-H Q370" }, + { PCI_DID_INTEL_CNP_H_LPC_B360, "Cannonlake-H B360" }, + { PCI_DID_INTEL_CNP_H_LPC_C246, "Cannonlake-H C246" }, + { PCI_DID_INTEL_CNP_H_LPC_C242, "Cannonlake-H C242" }, + { PCI_DID_INTEL_CNP_H_LPC_QM370, "Cannonlake-H QM370" }, + { PCI_DID_INTEL_CNP_H_LPC_HM370, "Cannonlake-H HM370" }, + { PCI_DID_INTEL_CNP_H_LPC_CM246, "Cannonlake-H CM246" }, + { PCI_DID_INTEL_CMP_SUPER_U_LPC, "Cometlake-U Super" }, + { PCI_DID_INTEL_CMP_PREMIUM_Y_LPC, "Cometlake-Y Premium" }, + { PCI_DID_INTEL_CMP_PREMIUM_U_LPC, "Cometlake-U Premium" }, + { PCI_DID_INTEL_CMP_BASE_U_LPC, "Cometlake-U Base" }, + { PCI_DID_INTEL_CMP_SUPER_Y_LPC, "Cometlake-Y Super" }, + { PCI_DID_INTEL_CMP_H_LPC_HM470, "Cometlake-H HM470" }, + { PCI_DID_INTEL_CMP_H_LPC_WM490, "Cometlake-H WM490" }, + { PCI_DID_INTEL_CMP_H_LPC_QM480, "Cometlake-H QM480" }, + { PCI_DID_INTEL_CMP_H_LPC_W480, "Cometlake-H W480" }, + { PCI_DID_INTEL_CMP_H_LPC_H470, "Cometlake-H H470" }, + { PCI_DID_INTEL_CMP_H_LPC_Z490, "Cometlake-H Z490" }, + { PCI_DID_INTEL_CMP_H_LPC_Q470, "Cometlake-H Q470" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1, "Cannonlake ULX GT2" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2, "Cannonlake ULX GT1.5" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_3, "Cannonlake ULX GT1" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_4, "Cannonlake ULX GT0.5" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_1, "Cannonlake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" }, - { PCI_DEVICE_ID_INTEL_CFL_GT2_ULT, "Coffeelake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1, "Whiskeylake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, "Coffeelake-H Xeon GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT1_1, "Coffeelake-S GT1" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT1_2, "Coffeelake-S GT1" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, "Coffeelake-S GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT2_2, "Coffeelake-S GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT2_3, "Coffeelake-S GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT2_4, "Coffeelake-S GT2" }, - { PCI_DEVICE_ID_INTEL_CFL_S_GT2_5, "Coffeelake-S GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2, "CometLake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1, "CometLake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2, "CometLake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3, "CometLake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4, "CometLake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3, "CometLake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4, "CometLake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5, "CometLake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6, "CometLake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1, "CometLake ULX GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_ULX_1, "CometLake ULX GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_S_1, "CometLake S GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_S_2, "CometLake S GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_S_1, "CometLake S GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_S_2, "CometLake S GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_S_G0, "CometLake S GT2 G0" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_S_P0, "CometLake S GT2 P0" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_H_1, "CometLake H GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT1_H_2, "CometLake H GT1" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_H_1, "CometLake H GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_H_2, "CometLake H GT2" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_H_R0, "CometLake H GT2 R0" }, - { PCI_DEVICE_ID_INTEL_CML_GT2_H_R1, "CometLake H GT2 R1" }, + { PCI_DID_INTEL_CNL_GT2_ULX_1, "Cannonlake ULX GT2" }, + { PCI_DID_INTEL_CNL_GT2_ULX_2, "Cannonlake ULX GT1.5" }, + { PCI_DID_INTEL_CNL_GT2_ULX_3, "Cannonlake ULX GT1" }, + { PCI_DID_INTEL_CNL_GT2_ULX_4, "Cannonlake ULX GT0.5" }, + { PCI_DID_INTEL_CNL_GT2_ULT_1, "Cannonlake ULT GT2" }, + { PCI_DID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" }, + { PCI_DID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" }, + { PCI_DID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" }, + { PCI_DID_INTEL_CFL_GT2_ULT, "Coffeelake ULT GT2" }, + { PCI_DID_INTEL_WHL_GT1_ULT_1, "Whiskeylake ULT GT1" }, + { PCI_DID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" }, + { PCI_DID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" }, + { PCI_DID_INTEL_CFL_H_XEON_GT2, "Coffeelake-H Xeon GT2" }, + { PCI_DID_INTEL_CFL_S_GT1_1, "Coffeelake-S GT1" }, + { PCI_DID_INTEL_CFL_S_GT1_2, "Coffeelake-S GT1" }, + { PCI_DID_INTEL_CFL_S_GT2_1, "Coffeelake-S GT2" }, + { PCI_DID_INTEL_CFL_S_GT2_2, "Coffeelake-S GT2" }, + { PCI_DID_INTEL_CFL_S_GT2_3, "Coffeelake-S GT2" }, + { PCI_DID_INTEL_CFL_S_GT2_4, "Coffeelake-S GT2" }, + { PCI_DID_INTEL_CFL_S_GT2_5, "Coffeelake-S GT2" }, + { PCI_DID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" }, + { PCI_DID_INTEL_CML_GT1_ULT_2, "CometLake ULT GT1" }, + { PCI_DID_INTEL_CML_GT2_ULT_1, "CometLake ULT GT2" }, + { PCI_DID_INTEL_CML_GT2_ULT_2, "CometLake ULT GT2" }, + { PCI_DID_INTEL_CML_GT1_ULT_3, "CometLake ULT GT1" }, + { PCI_DID_INTEL_CML_GT1_ULT_4, "CometLake ULT GT1" }, + { PCI_DID_INTEL_CML_GT2_ULT_3, "CometLake ULT GT2" }, + { PCI_DID_INTEL_CML_GT2_ULT_4, "CometLake ULT GT2" }, + { PCI_DID_INTEL_CML_GT2_ULT_5, "CometLake ULT GT2" }, + { PCI_DID_INTEL_CML_GT2_ULT_6, "CometLake ULT GT2" }, + { PCI_DID_INTEL_CML_GT1_ULX_1, "CometLake ULX GT1" }, + { PCI_DID_INTEL_CML_GT2_ULX_1, "CometLake ULX GT2" }, + { PCI_DID_INTEL_CML_GT1_S_1, "CometLake S GT1" }, + { PCI_DID_INTEL_CML_GT1_S_2, "CometLake S GT1" }, + { PCI_DID_INTEL_CML_GT2_S_1, "CometLake S GT2" }, + { PCI_DID_INTEL_CML_GT2_S_2, "CometLake S GT2" }, + { PCI_DID_INTEL_CML_GT2_S_G0, "CometLake S GT2 G0" }, + { PCI_DID_INTEL_CML_GT2_S_P0, "CometLake S GT2 P0" }, + { PCI_DID_INTEL_CML_GT1_H_1, "CometLake H GT1" }, + { PCI_DID_INTEL_CML_GT1_H_2, "CometLake H GT1" }, + { PCI_DID_INTEL_CML_GT2_H_1, "CometLake H GT2" }, + { PCI_DID_INTEL_CML_GT2_H_2, "CometLake H GT2" }, + { PCI_DID_INTEL_CML_GT2_H_R0, "CometLake H GT2 R0" }, + { PCI_DID_INTEL_CML_GT2_H_R1, "CometLake H GT2 R1" }, }; diff --git a/src/soc/intel/cannonlake/vr_config.c b/src/soc/intel/cannonlake/vr_config.c index ade1ef6277d9..bd5fefbdd3c5 100644 --- a/src/soc/intel/cannonlake/vr_config.c +++ b/src/soc/intel/cannonlake/vr_config.c @@ -178,108 +178,108 @@ static uint16_t load_table(const struct vr_lookup *tbl, * The above values in () are for baseline. */ -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CNL_ID_U) { +VR_CONFIG_ICC(PCI_DID_INTEL_CNL_ID_U) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(13, 34, 0, 0) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CNL_ID_Y) { +VR_CONFIG_ICC(PCI_DID_INTEL_CNL_ID_Y) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(13, 34, 0, 0) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_WHL_ID_W_4) { +VR_CONFIG_ICC(PCI_DID_INTEL_WHL_ID_W_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(6, 70, 31, 31) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_WHL_ID_W_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_WHL_ID_W_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(6, 35, 31, 31) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_U) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_U) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(8.5, 64, 64, 64) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_U_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_U_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(8.5, 64, 64, 64) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_H_8) { /* undocumented */ +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_H_8) { /* undocumented */ { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 128, 0, 0) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_H) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_H) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 128, 0, 0) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_H_4) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_H_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 86, 0, 0) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_DT_2) { { 58, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 79, 35, 35) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 58, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 40, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_DT_4) { { 71, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 100, 45, 45) }, { 62, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 79, 45, 45) }, { 35, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 66, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_DT_8) { { 80, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 193, 45, 45) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 186, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_S_8) { { 80, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 193, 45, 45) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 186, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_WS_8) { { 80, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 193, 45, 45) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 186, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S) { { 95, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 138, 45, 45) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 133, 45, 45) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_WS_6) { { 95, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 138, 45, 45) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 133, 45, 45) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_S_6) { { 95, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 138, 45, 45) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 133, 45, 45) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4) { +VR_CONFIG_ICC(PCI_DID_INTEL_CFL_ID_S_S_4) { { 71, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 100, 45, 45) }, { 62, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 79, 45, 45) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 66, 45, 45) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 66, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_ULT) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_ULT) { { 0, performance, VR_CFG_ALL_DOMAINS_ICC(6, 85, 31, 31) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(6, 70, 31, 31) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_ULT_6_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_ULT_6_2) { { 0, performance, VR_CFG_ALL_DOMAINS_ICC(6, 85, 31, 31) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(6, 70, 31, 31) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_ULT_2_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_ULT_2_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(6, 35, 31, 31) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_H_8_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_H_8_2) { { 65, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 165, 32, 32) }, { 65, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 192, 32, 32) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 140, 32, 32) }, { 0, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 165, 32, 32) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_H) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_H) { { 0, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 140, 32, 32) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 140, 32, 32) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_H_4_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_H_4_2) { { 0, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 105, 32, 32) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 86, 32, 32) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_S_P0P1_8_2) { {125, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 245, 35, 35) }, {125, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 210, 35, 35) }, { 80, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 210, 35, 35) }, @@ -288,7 +288,7 @@ VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2) { { 0, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 140, 35, 35) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_S_P0P1_10_2) { {125, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 245, 35, 35) }, {125, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 210, 35, 35) }, { 80, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 210, 35, 35) }, @@ -297,304 +297,304 @@ VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2) { { 0, performance, VR_CFG_ALL_DOMAINS_ICC(11.1, 140, 35, 35) }, { 0, baseline, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2) { { 65, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 140, 35, 35) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 104, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_4) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_S_G0G1_4) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 102, 35, 35) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 65, 35, 35) }, }; -VR_CONFIG_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_2) { +VR_CONFIG_ICC(PCI_DID_INTEL_CML_S_G0G1_2) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 60, 35, 35) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_ICC(11.1, 55, 35, 35) }, }; static const struct vr_lookup vr_config_icc[] = { - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CNL_ID_U), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CNL_ID_Y), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_WHL_ID_W_4), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_WHL_ID_W_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_U), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_U_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_H_8), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_H), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_H_4), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_ULT), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_ULT_6_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_ULT_2_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_H_8_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_H), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_H_4_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_4), - VR_REFITEM_ICC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_2), -}; - -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CNL_ID_U) { + VR_REFITEM_ICC(PCI_DID_INTEL_CNL_ID_U), + VR_REFITEM_ICC(PCI_DID_INTEL_CNL_ID_Y), + VR_REFITEM_ICC(PCI_DID_INTEL_WHL_ID_W_4), + VR_REFITEM_ICC(PCI_DID_INTEL_WHL_ID_W_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_U), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_U_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_H_8), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_H), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_H_4), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_DT_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_DT_4), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_DT_8), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_S_8), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_WS_8), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_WS_6), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_S_6), + VR_REFITEM_ICC(PCI_DID_INTEL_CFL_ID_S_S_4), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_ULT), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_ULT_6_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_ULT_2_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_H_8_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_H), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_H_4_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_S_P0P1_8_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_S_P0P1_10_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_S_G0G1_4), + VR_REFITEM_ICC(PCI_DID_INTEL_CML_S_G0G1_2), +}; + +VR_CONFIG_LL(PCI_DID_INTEL_CNL_ID_U) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 2.0, 2.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CNL_ID_Y) { +VR_CONFIG_LL(PCI_DID_INTEL_CNL_ID_Y) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 2.0, 2.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_WHL_ID_W_4) { /* unspecified */ +VR_CONFIG_LL(PCI_DID_INTEL_WHL_ID_W_4) { /* unspecified */ { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.8, 0, 0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_WHL_ID_W_2) { /* unspecified */ +VR_CONFIG_LL(PCI_DID_INTEL_WHL_ID_W_2) { /* unspecified */ { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 0, 0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_U) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_U) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 2.0, 2.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_U_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_U_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 2.0, 2.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_H_8) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_H_8) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.8, 2.7, 2.7) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_H) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_H) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.8, 2.7, 2.7) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_H_4) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_H_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.8, 2.7, 2.7) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_WS_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_DT_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_DT_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_DT_8) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.6, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_S_8) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.6, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_WS_8) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.6, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_WS_6) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_S_6) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4) { +VR_CONFIG_LL(PCI_DID_INTEL_CFL_ID_S_S_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.1, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_ULT) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_ULT) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.8, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_ULT_6_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_ULT_6_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.8, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_ULT_2_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_ULT_2_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 3.1, 3.1) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_H_8_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_H_8_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.1, 2.7, 2.7) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_H) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_H) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.1, 2.7, 2.7) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_H_4_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_H_4_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.1, 2.7, 2.7) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_S_P0P1_8_2) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.1, 4.0, 4.0) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.7, 4.0, 4.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_S_P0P1_10_2) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.1, 4.0, 4.0) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.7, 4.0, 4.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2) { {125, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.1, 4.0, 4.0) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.7, 4.0, 4.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_4) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_S_G0G1_4) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.7, 4.0, 4.0) }, }; -VR_CONFIG_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_2) { +VR_CONFIG_LL(PCI_DID_INTEL_CML_S_G0G1_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 1.7, 4.0, 4.0) }, }; static const struct vr_lookup vr_config_ll[] = { - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CNL_ID_U), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CNL_ID_Y), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_WHL_ID_W_4), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_WHL_ID_W_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_U), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_U_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_H_8), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_H), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_H_4), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_ULT), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_ULT_6_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_ULT_2_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_H_8_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_H), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_H_4_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_4), - VR_REFITEM_LL(PCI_DEVICE_ID_INTEL_CML_S_G0G1_2), -}; - -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_H) { + VR_REFITEM_LL(PCI_DID_INTEL_CNL_ID_U), + VR_REFITEM_LL(PCI_DID_INTEL_CNL_ID_Y), + VR_REFITEM_LL(PCI_DID_INTEL_WHL_ID_W_4), + VR_REFITEM_LL(PCI_DID_INTEL_WHL_ID_W_2), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_U), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_U_2), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_H_8), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_H), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_H_4), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_WS_4), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_DT_4), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_DT_2), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_DT_8), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_S_8), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_WS_8), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_WS_6), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_S_6), + VR_REFITEM_LL(PCI_DID_INTEL_CFL_ID_S_S_4), + VR_REFITEM_LL(PCI_DID_INTEL_CML_ULT), + VR_REFITEM_LL(PCI_DID_INTEL_CML_ULT_6_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_ULT_2_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_H_8_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_H), + VR_REFITEM_LL(PCI_DID_INTEL_CML_H_4_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_S_P0P1_8_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_S_P0P1_10_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2), + VR_REFITEM_LL(PCI_DID_INTEL_CML_S_G0G1_4), + VR_REFITEM_LL(PCI_DID_INTEL_CML_S_G0G1_2), +}; + +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_H) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 80, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S) { { 58, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 33, 30, 30) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 31, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 29, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_DT_2) { { 58, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 33, 30, 30) }, { 54, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 31, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 29, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_S_4) { { 71, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 70, 30, 30) }, { 62, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 62, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 45, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_WS_4) { { 71, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 70, 30, 30) }, { 62, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 62, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 45, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_DT_4) { { 71, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 70, 30, 30) }, { 62, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 62, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 45, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_WS_6) { { 95, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 100, 30, 30) }, { 80, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 89, 30, 30) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 91, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 74, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_S_6) { { 95, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 100, 30, 30) }, { 80, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 89, 30, 30) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 91, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 74, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_S_8) { { 80, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 150, 30, 30) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 146, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 74, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_WS_8) { { 80, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 150, 30, 30) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 146, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 74, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8) { +VR_CONFIG_TDC(PCI_DID_INTEL_CFL_ID_S_DT_8) { { 80, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 150, 30, 30) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 146, 30, 30) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 74, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_ULT) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_ULT) { { 0, baseline, VR_CFG_ALL_DOMAINS_TDC(4, 48, 22, 22) }, { 0, performance, VR_CFG_ALL_DOMAINS_TDC(4, 58, 22, 22) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_ULT_6_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_ULT_6_2) { { 0, baseline, VR_CFG_ALL_DOMAINS_TDC(4, 48, 22, 22) }, { 0, performance, VR_CFG_ALL_DOMAINS_TDC(4, 58, 22, 22) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_ULT_2_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_ULT_2_2) { { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(4, 24, 22, 22) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_H_8_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_H_8_2) { { 65, performance, VR_CFG_ALL_DOMAINS_TDC(10, 146, 25, 25) }, { 65, baseline, VR_CFG_ALL_DOMAINS_TDC(10, 117, 25, 25) }, { 0, performance, VR_CFG_ALL_DOMAINS_TDC(10, 125, 25, 25) }, { 0, baseline, VR_CFG_ALL_DOMAINS_TDC(10, 86, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_H) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_H) { { 0, performance, VR_CFG_ALL_DOMAINS_TDC(10, 92, 25, 25) }, { 0, baseline, VR_CFG_ALL_DOMAINS_TDC(10, 80, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_H_4_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_H_4_2) { { 0, performance, VR_CFG_ALL_DOMAINS_TDC(10, 80, 25, 25) }, { 0, baseline, VR_CFG_ALL_DOMAINS_TDC(10, 60, 25, 25) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_S_P0P1_8_2) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 175, 28, 28) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 100, 28, 28) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_S_P0P1_10_2) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 175, 28, 28) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 100, 28, 28) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2) { {125, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 132, 28, 28) }, { 65, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 104, 28, 28) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 74, 28, 28) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_4) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_S_G0G1_4) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 68, 28, 28) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 42, 28, 28) }, }; -VR_CONFIG_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_2) { +VR_CONFIG_TDC(PCI_DID_INTEL_CML_S_G0G1_2) { { 36, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 38, 28, 28) }, { 0, value_not_set, VR_CFG_ALL_DOMAINS_TDC(10, 25, 28, 28) }, }; static const struct vr_lookup vr_config_tdc[] = { - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_H), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_ULT), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_ULT_6_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_ULT_2_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_H_8_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_H), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_H_4_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_4), - VR_REFITEM_TDC(PCI_DEVICE_ID_INTEL_CML_S_G0G1_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_H), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_DT_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_S_4), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_WS_4), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_DT_4), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_WS_6), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_S_6), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_S_8), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_WS_8), + VR_REFITEM_TDC(PCI_DID_INTEL_CFL_ID_S_DT_8), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_ULT), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_ULT_6_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_ULT_2_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_H_8_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_H), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_H_4_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_S_P0P1_8_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_S_P0P1_10_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_S_G0G1_4), + VR_REFITEM_TDC(PCI_DID_INTEL_CML_S_G0G1_2), }; static uint16_t get_sku_voltagelimit(int domain) diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index 8ce313586b48..fd0c33de4a59 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -21,34 +21,34 @@ static struct device_operations cnvi_wifi_ops = { }; static const unsigned short wifi_pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_CML_LP_CNVI_WIFI, - PCI_DEVICE_ID_INTEL_CML_H_CNVI_WIFI, - PCI_DEVICE_ID_INTEL_CNL_LP_CNVI_WIFI, - PCI_DEVICE_ID_INTEL_CNL_H_CNVI_WIFI, - PCI_DEVICE_ID_INTEL_GLK_CNVI_WIFI, - PCI_DEVICE_ID_INTEL_ICL_CNVI_WIFI, - PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_0, - PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_1, - PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_2, - PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_3, - PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_0, - PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_1, - PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_2, - PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_3, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_0, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_1, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_2, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_3, - PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_0, - PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_1, - PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_2, - PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_3, + PCI_DID_INTEL_CML_LP_CNVI_WIFI, + PCI_DID_INTEL_CML_H_CNVI_WIFI, + PCI_DID_INTEL_CNL_LP_CNVI_WIFI, + PCI_DID_INTEL_CNL_H_CNVI_WIFI, + PCI_DID_INTEL_GLK_CNVI_WIFI, + PCI_DID_INTEL_ICL_CNVI_WIFI, + PCI_DID_INTEL_JSL_CNVI_WIFI_0, + PCI_DID_INTEL_JSL_CNVI_WIFI_1, + PCI_DID_INTEL_JSL_CNVI_WIFI_2, + PCI_DID_INTEL_JSL_CNVI_WIFI_3, + PCI_DID_INTEL_TGL_CNVI_WIFI_0, + PCI_DID_INTEL_TGL_CNVI_WIFI_1, + PCI_DID_INTEL_TGL_CNVI_WIFI_2, + PCI_DID_INTEL_TGL_CNVI_WIFI_3, + PCI_DID_INTEL_TGL_H_CNVI_WIFI_0, + PCI_DID_INTEL_TGL_H_CNVI_WIFI_1, + PCI_DID_INTEL_TGL_H_CNVI_WIFI_2, + PCI_DID_INTEL_TGL_H_CNVI_WIFI_3, + PCI_DID_INTEL_ADL_N_CNVI_WIFI_0, + PCI_DID_INTEL_ADL_N_CNVI_WIFI_1, + PCI_DID_INTEL_ADL_N_CNVI_WIFI_2, + PCI_DID_INTEL_ADL_N_CNVI_WIFI_3, 0 }; static const struct pci_driver pch_cnvi_wifi __pci_driver = { .ops = &cnvi_wifi_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = wifi_pci_device_ids, }; @@ -68,18 +68,18 @@ static struct device_operations cnvi_bt_ops = { }; static const unsigned short bt_pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_0, - PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_1, - PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_2, - PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_3, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_0, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_1, - PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_2, + PCI_DID_INTEL_TGL_CNVI_BT_0, + PCI_DID_INTEL_TGL_CNVI_BT_1, + PCI_DID_INTEL_TGL_CNVI_BT_2, + PCI_DID_INTEL_TGL_CNVI_BT_3, + PCI_DID_INTEL_TGL_H_CNVI_BT_0, + PCI_DID_INTEL_TGL_H_CNVI_BT_1, + PCI_DID_INTEL_TGL_H_CNVI_BT_2, 0 }; static const struct pci_driver pch_cnvi_bt __pci_driver = { .ops = &cnvi_bt_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = bt_pci_device_ids, }; diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 19d733602e7c..b0b2c5adafff 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -1257,44 +1257,44 @@ static struct device_operations cse_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_CSE0, - PCI_DEVICE_ID_INTEL_GLK_CSE0, - PCI_DEVICE_ID_INTEL_CNL_CSE0, - PCI_DEVICE_ID_INTEL_SKL_CSE0, - PCI_DEVICE_ID_INTEL_LWB_CSE0, - PCI_DEVICE_ID_INTEL_LWB_CSE0_SUPER, - PCI_DEVICE_ID_INTEL_CNP_H_CSE0, - PCI_DEVICE_ID_INTEL_ICL_CSE0, - PCI_DEVICE_ID_INTEL_CMP_CSE0, - PCI_DEVICE_ID_INTEL_CMP_H_CSE0, - PCI_DEVICE_ID_INTEL_TGL_CSE0, - PCI_DEVICE_ID_INTEL_TGL_H_CSE0, - PCI_DEVICE_ID_INTEL_MCC_CSE0, - PCI_DEVICE_ID_INTEL_MCC_CSE1, - PCI_DEVICE_ID_INTEL_MCC_CSE2, - PCI_DEVICE_ID_INTEL_MCC_CSE3, - PCI_DEVICE_ID_INTEL_JSP_CSE0, - PCI_DEVICE_ID_INTEL_JSP_CSE1, - PCI_DEVICE_ID_INTEL_JSP_CSE2, - PCI_DEVICE_ID_INTEL_JSP_CSE3, - PCI_DEVICE_ID_INTEL_ADP_P_CSE0, - PCI_DEVICE_ID_INTEL_ADP_P_CSE1, - PCI_DEVICE_ID_INTEL_ADP_P_CSE2, - PCI_DEVICE_ID_INTEL_ADP_P_CSE3, - PCI_DEVICE_ID_INTEL_ADP_S_CSE0, - PCI_DEVICE_ID_INTEL_ADP_S_CSE1, - PCI_DEVICE_ID_INTEL_ADP_S_CSE2, - PCI_DEVICE_ID_INTEL_ADP_S_CSE3, - PCI_DEVICE_ID_INTEL_ADP_M_CSE0, - PCI_DEVICE_ID_INTEL_ADP_M_CSE1, - PCI_DEVICE_ID_INTEL_ADP_M_CSE2, - PCI_DEVICE_ID_INTEL_ADP_M_CSE3, + PCI_DID_INTEL_APL_CSE0, + PCI_DID_INTEL_GLK_CSE0, + PCI_DID_INTEL_CNL_CSE0, + PCI_DID_INTEL_SKL_CSE0, + PCI_DID_INTEL_LWB_CSE0, + PCI_DID_INTEL_LWB_CSE0_SUPER, + PCI_DID_INTEL_CNP_H_CSE0, + PCI_DID_INTEL_ICL_CSE0, + PCI_DID_INTEL_CMP_CSE0, + PCI_DID_INTEL_CMP_H_CSE0, + PCI_DID_INTEL_TGL_CSE0, + PCI_DID_INTEL_TGL_H_CSE0, + PCI_DID_INTEL_MCC_CSE0, + PCI_DID_INTEL_MCC_CSE1, + PCI_DID_INTEL_MCC_CSE2, + PCI_DID_INTEL_MCC_CSE3, + PCI_DID_INTEL_JSP_CSE0, + PCI_DID_INTEL_JSP_CSE1, + PCI_DID_INTEL_JSP_CSE2, + PCI_DID_INTEL_JSP_CSE3, + PCI_DID_INTEL_ADP_P_CSE0, + PCI_DID_INTEL_ADP_P_CSE1, + PCI_DID_INTEL_ADP_P_CSE2, + PCI_DID_INTEL_ADP_P_CSE3, + PCI_DID_INTEL_ADP_S_CSE0, + PCI_DID_INTEL_ADP_S_CSE1, + PCI_DID_INTEL_ADP_S_CSE2, + PCI_DID_INTEL_ADP_S_CSE3, + PCI_DID_INTEL_ADP_M_CSE0, + PCI_DID_INTEL_ADP_M_CSE1, + PCI_DID_INTEL_ADP_M_CSE2, + PCI_DID_INTEL_ADP_M_CSE3, 0, }; static const struct pci_driver cse_driver __pci_driver = { .ops = &cse_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, /* SoC/chipset needs to provide PCI device ID */ .devices = pci_device_ids }; diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c index 35e167054a05..102ec60594eb 100644 --- a/src/soc/intel/common/block/dsp/dsp.c +++ b/src/soc/intel/common/block/dsp/dsp.c @@ -13,39 +13,39 @@ static struct device_operations dsp_dev_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_AUDIO, - PCI_DEVICE_ID_INTEL_CNL_AUDIO, - PCI_DEVICE_ID_INTEL_GLK_AUDIO, - PCI_DEVICE_ID_INTEL_SKL_AUDIO, - PCI_DEVICE_ID_INTEL_CNP_H_AUDIO, - PCI_DEVICE_ID_INTEL_CMP_AUDIO, - PCI_DEVICE_ID_INTEL_CMP_H_AUDIO, - PCI_DEVICE_ID_INTEL_ICL_AUDIO, - PCI_DEVICE_ID_INTEL_TGL_AUDIO, - PCI_DEVICE_ID_INTEL_TGL_H_AUDIO, - PCI_DEVICE_ID_INTEL_MCC_AUDIO, - PCI_DEVICE_ID_INTEL_JSP_AUDIO, - PCI_DEVICE_ID_INTEL_ADP_P_AUDIO, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_1, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_2, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_3, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_4, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_5, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_6, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_7, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_8, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_1, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_2, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_3, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_4, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_5, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_6, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_7, + PCI_DID_INTEL_APL_AUDIO, + PCI_DID_INTEL_CNL_AUDIO, + PCI_DID_INTEL_GLK_AUDIO, + PCI_DID_INTEL_SKL_AUDIO, + PCI_DID_INTEL_CNP_H_AUDIO, + PCI_DID_INTEL_CMP_AUDIO, + PCI_DID_INTEL_CMP_H_AUDIO, + PCI_DID_INTEL_ICL_AUDIO, + PCI_DID_INTEL_TGL_AUDIO, + PCI_DID_INTEL_TGL_H_AUDIO, + PCI_DID_INTEL_MCC_AUDIO, + PCI_DID_INTEL_JSP_AUDIO, + PCI_DID_INTEL_ADP_P_AUDIO, + PCI_DID_INTEL_ADP_S_AUDIO_1, + PCI_DID_INTEL_ADP_S_AUDIO_2, + PCI_DID_INTEL_ADP_S_AUDIO_3, + PCI_DID_INTEL_ADP_S_AUDIO_4, + PCI_DID_INTEL_ADP_S_AUDIO_5, + PCI_DID_INTEL_ADP_S_AUDIO_6, + PCI_DID_INTEL_ADP_S_AUDIO_7, + PCI_DID_INTEL_ADP_S_AUDIO_8, + PCI_DID_INTEL_ADP_M_N_AUDIO_1, + PCI_DID_INTEL_ADP_M_N_AUDIO_2, + PCI_DID_INTEL_ADP_M_N_AUDIO_3, + PCI_DID_INTEL_ADP_M_N_AUDIO_4, + PCI_DID_INTEL_ADP_M_N_AUDIO_5, + PCI_DID_INTEL_ADP_M_N_AUDIO_6, + PCI_DID_INTEL_ADP_M_N_AUDIO_7, 0, }; static const struct pci_driver dsp_driver __pci_driver = { .ops = &dsp_dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/dtt/dtt.c b/src/soc/intel/common/block/dtt/dtt.c index 58afd744f26f..e15e3029560c 100644 --- a/src/soc/intel/common/block/dtt/dtt.c +++ b/src/soc/intel/common/block/dtt/dtt.c @@ -5,10 +5,10 @@ #include <device/pci_ids.h> static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_CML_DTT, - PCI_DEVICE_ID_INTEL_TGL_DTT, - PCI_DEVICE_ID_INTEL_JSL_DTT, - PCI_DEVICE_ID_INTEL_ADL_DTT, + PCI_DID_INTEL_CML_DTT, + PCI_DID_INTEL_TGL_DTT, + PCI_DID_INTEL_JSL_DTT, + PCI_DID_INTEL_ADL_DTT, 0 }; @@ -22,6 +22,6 @@ static struct device_operations dptf_dev_ops = { static const struct pci_driver pch_dptf __pci_driver = { .ops = &dptf_dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 6118f9960f33..84e800db6f65 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -177,150 +177,150 @@ static const struct device_operations graphics_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_IGD_HD_505, - PCI_DEVICE_ID_INTEL_APL_IGD_HD_500, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_3, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_4, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_1, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, - PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, - PCI_DEVICE_ID_INTEL_GLK_IGD, - PCI_DEVICE_ID_INTEL_GLK_IGD_EU12, - PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1, - PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, - PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, - PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_1, - PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_2, - PCI_DEVICE_ID_INTEL_KBL_GT1_SSRVM, - PCI_DEVICE_ID_INTEL_KBL_GT1F_DT2, - PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, - PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, - PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, - PCI_DEVICE_ID_INTEL_KBL_GT2_SSRVM, - PCI_DEVICE_ID_INTEL_KBL_GT2_SWSTM, - PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, - PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, - PCI_DEVICE_ID_INTEL_KBL_GT2F_SULTM, - PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1, - PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2, - PCI_DEVICE_ID_INTEL_KBL_GT4_SHALM, - PCI_DEVICE_ID_INTEL_AML_GT2_ULX, - PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, - PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, - PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, - PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, - PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, - PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, - PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, - PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, - PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, - PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, - PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM, - PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, - PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, - PCI_DEVICE_ID_INTEL_CFL_H_GT2, - PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, - PCI_DEVICE_ID_INTEL_CFL_S_GT1_1, - PCI_DEVICE_ID_INTEL_CFL_S_GT1_2, - PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, - PCI_DEVICE_ID_INTEL_CFL_S_GT2_2, - PCI_DEVICE_ID_INTEL_CFL_S_GT2_3, - PCI_DEVICE_ID_INTEL_CFL_S_GT2_4, - PCI_DEVICE_ID_INTEL_CFL_S_GT2_5, - PCI_DEVICE_ID_INTEL_ICL_GT0_ULT, - PCI_DEVICE_ID_INTEL_ICL_GT0_5_ULT, - PCI_DEVICE_ID_INTEL_ICL_GT1_ULT, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_0, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_1, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_1, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_2, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_2, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_3, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_3, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_4, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_4, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_5, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_5, - PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_6, - PCI_DEVICE_ID_INTEL_ICL_GT3_ULT, - PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, - PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2, - PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1, - PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2, - PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3, - PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4, - PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5, - PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6, - PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3, - PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4, - PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1, - PCI_DEVICE_ID_INTEL_CML_GT2_ULX_1, - PCI_DEVICE_ID_INTEL_CML_GT1_S_1, - PCI_DEVICE_ID_INTEL_CML_GT1_S_2, - PCI_DEVICE_ID_INTEL_CML_GT2_S_1, - PCI_DEVICE_ID_INTEL_CML_GT2_S_2, - PCI_DEVICE_ID_INTEL_CML_GT1_H_1, - PCI_DEVICE_ID_INTEL_CML_GT1_H_2, - PCI_DEVICE_ID_INTEL_CML_GT2_H_1, - PCI_DEVICE_ID_INTEL_CML_GT2_H_2, - PCI_DEVICE_ID_INTEL_CML_GT2_S_G0, - PCI_DEVICE_ID_INTEL_CML_GT2_S_P0, - PCI_DEVICE_ID_INTEL_CML_GT2_H_R0, - PCI_DEVICE_ID_INTEL_CML_GT2_H_R1, - PCI_DEVICE_ID_INTEL_TGL_GT0, - PCI_DEVICE_ID_INTEL_TGL_GT1_H_32, - PCI_DEVICE_ID_INTEL_TGL_GT1_H_16, - PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, - PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, - PCI_DEVICE_ID_INTEL_TGL_GT3_ULT, - PCI_DEVICE_ID_INTEL_TGL_GT2_ULT_1, - PCI_DEVICE_ID_INTEL_EHL_GT1_1, - PCI_DEVICE_ID_INTEL_EHL_GT2_1, - PCI_DEVICE_ID_INTEL_EHL_GT1_2, - PCI_DEVICE_ID_INTEL_EHL_GT2_2, - PCI_DEVICE_ID_INTEL_EHL_GT1_2_1, - PCI_DEVICE_ID_INTEL_EHL_GT1_3, - PCI_DEVICE_ID_INTEL_EHL_GT2_3, - PCI_DEVICE_ID_INTEL_JSL_GT1, - PCI_DEVICE_ID_INTEL_JSL_GT2, - PCI_DEVICE_ID_INTEL_JSL_GT3, - PCI_DEVICE_ID_INTEL_JSL_GT4, - PCI_DEVICE_ID_INTEL_ADL_GT0, - PCI_DEVICE_ID_INTEL_ADL_GT1, - PCI_DEVICE_ID_INTEL_ADL_GT1_1, - PCI_DEVICE_ID_INTEL_ADL_GT1_2, - PCI_DEVICE_ID_INTEL_ADL_GT1_3, - PCI_DEVICE_ID_INTEL_ADL_GT1_4, - PCI_DEVICE_ID_INTEL_ADL_GT1_5, - PCI_DEVICE_ID_INTEL_ADL_GT1_6, - PCI_DEVICE_ID_INTEL_ADL_GT1_7, - PCI_DEVICE_ID_INTEL_ADL_GT1_8, - PCI_DEVICE_ID_INTEL_ADL_GT1_9, - PCI_DEVICE_ID_INTEL_ADL_P_GT2, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_7, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_8, - PCI_DEVICE_ID_INTEL_ADL_P_GT2_9, - PCI_DEVICE_ID_INTEL_ADL_S_GT1, - PCI_DEVICE_ID_INTEL_ADL_M_GT1, - PCI_DEVICE_ID_INTEL_ADL_M_GT2, - PCI_DEVICE_ID_INTEL_ADL_M_GT3, - PCI_DEVICE_ID_INTEL_ADL_N_GT1, - PCI_DEVICE_ID_INTEL_ADL_N_GT2, - PCI_DEVICE_ID_INTEL_ADL_N_GT3, + PCI_DID_INTEL_APL_IGD_HD_505, + PCI_DID_INTEL_APL_IGD_HD_500, + PCI_DID_INTEL_CNL_GT2_ULX_1, + PCI_DID_INTEL_CNL_GT2_ULX_2, + PCI_DID_INTEL_CNL_GT2_ULX_3, + PCI_DID_INTEL_CNL_GT2_ULX_4, + PCI_DID_INTEL_CNL_GT2_ULT_1, + PCI_DID_INTEL_CNL_GT2_ULT_2, + PCI_DID_INTEL_CNL_GT2_ULT_3, + PCI_DID_INTEL_CNL_GT2_ULT_4, + PCI_DID_INTEL_GLK_IGD, + PCI_DID_INTEL_GLK_IGD_EU12, + PCI_DID_INTEL_WHL_GT1_ULT_1, + PCI_DID_INTEL_WHL_GT2_ULT_1, + PCI_DID_INTEL_KBL_GT1_SULTM, + PCI_DID_INTEL_KBL_GT1_SHALM_1, + PCI_DID_INTEL_KBL_GT1_SHALM_2, + PCI_DID_INTEL_KBL_GT1_SSRVM, + PCI_DID_INTEL_KBL_GT1F_DT2, + PCI_DID_INTEL_KBL_GT2_SULXM, + PCI_DID_INTEL_KBL_GT2_SULTM, + PCI_DID_INTEL_KBL_GT2_SULTMR, + PCI_DID_INTEL_KBL_GT2_SSRVM, + PCI_DID_INTEL_KBL_GT2_SWSTM, + PCI_DID_INTEL_KBL_GT2_SHALM, + PCI_DID_INTEL_KBL_GT2_DT2P2, + PCI_DID_INTEL_KBL_GT2F_SULTM, + PCI_DID_INTEL_KBL_GT3E_SULTM_1, + PCI_DID_INTEL_KBL_GT3E_SULTM_2, + PCI_DID_INTEL_KBL_GT4_SHALM, + PCI_DID_INTEL_AML_GT2_ULX, + PCI_DID_INTEL_SKL_GT1F_DT2, + PCI_DID_INTEL_SKL_GT1_SULTM, + PCI_DID_INTEL_SKL_GT2_DT2P1, + PCI_DID_INTEL_SKL_GT2_SULXM, + PCI_DID_INTEL_SKL_GT2_SULTM, + PCI_DID_INTEL_SKL_GT2_SHALM, + PCI_DID_INTEL_SKL_GT2_SWKSM, + PCI_DID_INTEL_SKL_GT3_SULTM, + PCI_DID_INTEL_SKL_GT3E_SULTM_1, + PCI_DID_INTEL_SKL_GT3E_SULTM_2, + PCI_DID_INTEL_SKL_GT3FE_SSRVM, + PCI_DID_INTEL_SKL_GT4_SHALM, + PCI_DID_INTEL_SKL_GT4E_SWSTM, + PCI_DID_INTEL_CFL_H_GT2, + PCI_DID_INTEL_CFL_H_XEON_GT2, + PCI_DID_INTEL_CFL_S_GT1_1, + PCI_DID_INTEL_CFL_S_GT1_2, + PCI_DID_INTEL_CFL_S_GT2_1, + PCI_DID_INTEL_CFL_S_GT2_2, + PCI_DID_INTEL_CFL_S_GT2_3, + PCI_DID_INTEL_CFL_S_GT2_4, + PCI_DID_INTEL_CFL_S_GT2_5, + PCI_DID_INTEL_ICL_GT0_ULT, + PCI_DID_INTEL_ICL_GT0_5_ULT, + PCI_DID_INTEL_ICL_GT1_ULT, + PCI_DID_INTEL_ICL_GT2_ULX_0, + PCI_DID_INTEL_ICL_GT2_ULX_1, + PCI_DID_INTEL_ICL_GT2_ULT_1, + PCI_DID_INTEL_ICL_GT2_ULX_2, + PCI_DID_INTEL_ICL_GT2_ULT_2, + PCI_DID_INTEL_ICL_GT2_ULX_3, + PCI_DID_INTEL_ICL_GT2_ULT_3, + PCI_DID_INTEL_ICL_GT2_ULX_4, + PCI_DID_INTEL_ICL_GT2_ULT_4, + PCI_DID_INTEL_ICL_GT2_ULX_5, + PCI_DID_INTEL_ICL_GT2_ULT_5, + PCI_DID_INTEL_ICL_GT2_ULX_6, + PCI_DID_INTEL_ICL_GT3_ULT, + PCI_DID_INTEL_CML_GT1_ULT_1, + PCI_DID_INTEL_CML_GT1_ULT_2, + PCI_DID_INTEL_CML_GT2_ULT_1, + PCI_DID_INTEL_CML_GT2_ULT_2, + PCI_DID_INTEL_CML_GT1_ULT_3, + PCI_DID_INTEL_CML_GT1_ULT_4, + PCI_DID_INTEL_CML_GT2_ULT_5, + PCI_DID_INTEL_CML_GT2_ULT_6, + PCI_DID_INTEL_CML_GT2_ULT_3, + PCI_DID_INTEL_CML_GT2_ULT_4, + PCI_DID_INTEL_CML_GT1_ULX_1, + PCI_DID_INTEL_CML_GT2_ULX_1, + PCI_DID_INTEL_CML_GT1_S_1, + PCI_DID_INTEL_CML_GT1_S_2, + PCI_DID_INTEL_CML_GT2_S_1, + PCI_DID_INTEL_CML_GT2_S_2, + PCI_DID_INTEL_CML_GT1_H_1, + PCI_DID_INTEL_CML_GT1_H_2, + PCI_DID_INTEL_CML_GT2_H_1, + PCI_DID_INTEL_CML_GT2_H_2, + PCI_DID_INTEL_CML_GT2_S_G0, + PCI_DID_INTEL_CML_GT2_S_P0, + PCI_DID_INTEL_CML_GT2_H_R0, + PCI_DID_INTEL_CML_GT2_H_R1, + PCI_DID_INTEL_TGL_GT0, + PCI_DID_INTEL_TGL_GT1_H_32, + PCI_DID_INTEL_TGL_GT1_H_16, + PCI_DID_INTEL_TGL_GT2_ULT, + PCI_DID_INTEL_TGL_GT2_ULX, + PCI_DID_INTEL_TGL_GT3_ULT, + PCI_DID_INTEL_TGL_GT2_ULT_1, + PCI_DID_INTEL_EHL_GT1_1, + PCI_DID_INTEL_EHL_GT2_1, + PCI_DID_INTEL_EHL_GT1_2, + PCI_DID_INTEL_EHL_GT2_2, + PCI_DID_INTEL_EHL_GT1_2_1, + PCI_DID_INTEL_EHL_GT1_3, + PCI_DID_INTEL_EHL_GT2_3, + PCI_DID_INTEL_JSL_GT1, + PCI_DID_INTEL_JSL_GT2, + PCI_DID_INTEL_JSL_GT3, + PCI_DID_INTEL_JSL_GT4, + PCI_DID_INTEL_ADL_GT0, + PCI_DID_INTEL_ADL_GT1, + PCI_DID_INTEL_ADL_GT1_1, + PCI_DID_INTEL_ADL_GT1_2, + PCI_DID_INTEL_ADL_GT1_3, + PCI_DID_INTEL_ADL_GT1_4, + PCI_DID_INTEL_ADL_GT1_5, + PCI_DID_INTEL_ADL_GT1_6, + PCI_DID_INTEL_ADL_GT1_7, + PCI_DID_INTEL_ADL_GT1_8, + PCI_DID_INTEL_ADL_GT1_9, + PCI_DID_INTEL_ADL_P_GT2, + PCI_DID_INTEL_ADL_P_GT2_1, + PCI_DID_INTEL_ADL_P_GT2_2, + PCI_DID_INTEL_ADL_P_GT2_3, + PCI_DID_INTEL_ADL_P_GT2_4, + PCI_DID_INTEL_ADL_P_GT2_5, + PCI_DID_INTEL_ADL_P_GT2_6, + PCI_DID_INTEL_ADL_P_GT2_7, + PCI_DID_INTEL_ADL_P_GT2_8, + PCI_DID_INTEL_ADL_P_GT2_9, + PCI_DID_INTEL_ADL_S_GT1, + PCI_DID_INTEL_ADL_M_GT1, + PCI_DID_INTEL_ADL_M_GT2, + PCI_DID_INTEL_ADL_M_GT3, + PCI_DID_INTEL_ADL_N_GT1, + PCI_DID_INTEL_ADL_N_GT2, + PCI_DID_INTEL_ADL_N_GT3, 0, }; static const struct pci_driver graphics_driver __pci_driver = { .ops = &graphics_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/hda/hda.c b/src/soc/intel/common/block/hda/hda.c index 1afc16c787b1..1311bcd6b2e8 100644 --- a/src/soc/intel/common/block/hda/hda.c +++ b/src/soc/intel/common/block/hda/hda.c @@ -21,42 +21,42 @@ static struct device_operations hda_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SKL_AUDIO, - PCI_DEVICE_ID_INTEL_SKL_H_AUDIO, - PCI_DEVICE_ID_INTEL_LWB_AUDIO, - PCI_DEVICE_ID_INTEL_LWB_AUDIO_SUPER, - PCI_DEVICE_ID_INTEL_KBL_AUDIO, - PCI_DEVICE_ID_INTEL_CNL_AUDIO, - PCI_DEVICE_ID_INTEL_CNP_H_AUDIO, - PCI_DEVICE_ID_INTEL_ICL_AUDIO, - PCI_DEVICE_ID_INTEL_CMP_AUDIO, - PCI_DEVICE_ID_INTEL_CMP_H_AUDIO, - PCI_DEVICE_ID_INTEL_BSW_AUDIO, - PCI_DEVICE_ID_INTEL_TGL_AUDIO, - PCI_DEVICE_ID_INTEL_TGL_H_AUDIO, - PCI_DEVICE_ID_INTEL_MCC_AUDIO, - PCI_DEVICE_ID_INTEL_JSP_AUDIO, - PCI_DEVICE_ID_INTEL_ADP_P_AUDIO, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_1, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_2, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_3, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_4, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_5, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_6, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_7, - PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_8, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_1, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_2, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_3, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_4, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_5, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_6, - PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_7, + PCI_DID_INTEL_SKL_AUDIO, + PCI_DID_INTEL_SKL_H_AUDIO, + PCI_DID_INTEL_LWB_AUDIO, + PCI_DID_INTEL_LWB_AUDIO_SUPER, + PCI_DID_INTEL_KBL_AUDIO, + PCI_DID_INTEL_CNL_AUDIO, + PCI_DID_INTEL_CNP_H_AUDIO, + PCI_DID_INTEL_ICL_AUDIO, + PCI_DID_INTEL_CMP_AUDIO, + PCI_DID_INTEL_CMP_H_AUDIO, + PCI_DID_INTEL_BSW_AUDIO, + PCI_DID_INTEL_TGL_AUDIO, + PCI_DID_INTEL_TGL_H_AUDIO, + PCI_DID_INTEL_MCC_AUDIO, + PCI_DID_INTEL_JSP_AUDIO, + PCI_DID_INTEL_ADP_P_AUDIO, + PCI_DID_INTEL_ADP_S_AUDIO_1, + PCI_DID_INTEL_ADP_S_AUDIO_2, + PCI_DID_INTEL_ADP_S_AUDIO_3, + PCI_DID_INTEL_ADP_S_AUDIO_4, + PCI_DID_INTEL_ADP_S_AUDIO_5, + PCI_DID_INTEL_ADP_S_AUDIO_6, + PCI_DID_INTEL_ADP_S_AUDIO_7, + PCI_DID_INTEL_ADP_S_AUDIO_8, + PCI_DID_INTEL_ADP_M_N_AUDIO_1, + PCI_DID_INTEL_ADP_M_N_AUDIO_2, + PCI_DID_INTEL_ADP_M_N_AUDIO_3, + PCI_DID_INTEL_ADP_M_N_AUDIO_4, + PCI_DID_INTEL_ADP_M_N_AUDIO_5, + PCI_DID_INTEL_ADP_M_N_AUDIO_6, + PCI_DID_INTEL_ADP_M_N_AUDIO_7, 0 }; static const struct pci_driver pch_hda __pci_driver = { .ops = &hda_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index c1d75e0fa737..ba10b2c5bb48 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -175,113 +175,113 @@ static struct device_operations i2c_dev_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_I2C0, - PCI_DEVICE_ID_INTEL_SPT_I2C1, - PCI_DEVICE_ID_INTEL_SPT_I2C2, - PCI_DEVICE_ID_INTEL_SPT_I2C3, - PCI_DEVICE_ID_INTEL_SPT_I2C4, - PCI_DEVICE_ID_INTEL_SPT_I2C5, - PCI_DEVICE_ID_INTEL_UPT_H_I2C0, - PCI_DEVICE_ID_INTEL_UPT_H_I2C1, - PCI_DEVICE_ID_INTEL_UPT_H_I2C2, - PCI_DEVICE_ID_INTEL_UPT_H_I2C3, - PCI_DEVICE_ID_INTEL_APL_I2C0, - PCI_DEVICE_ID_INTEL_APL_I2C1, - PCI_DEVICE_ID_INTEL_APL_I2C2, - PCI_DEVICE_ID_INTEL_APL_I2C3, - PCI_DEVICE_ID_INTEL_APL_I2C4, - PCI_DEVICE_ID_INTEL_APL_I2C5, - PCI_DEVICE_ID_INTEL_APL_I2C6, - PCI_DEVICE_ID_INTEL_APL_I2C7, - PCI_DEVICE_ID_INTEL_CNL_I2C0, - PCI_DEVICE_ID_INTEL_CNL_I2C1, - PCI_DEVICE_ID_INTEL_CNL_I2C2, - PCI_DEVICE_ID_INTEL_CNL_I2C3, - PCI_DEVICE_ID_INTEL_CNL_I2C4, - PCI_DEVICE_ID_INTEL_CNL_I2C5, - PCI_DEVICE_ID_INTEL_GLK_I2C0, - PCI_DEVICE_ID_INTEL_GLK_I2C1, - PCI_DEVICE_ID_INTEL_GLK_I2C2, - PCI_DEVICE_ID_INTEL_GLK_I2C3, - PCI_DEVICE_ID_INTEL_GLK_I2C4, - PCI_DEVICE_ID_INTEL_GLK_I2C5, - PCI_DEVICE_ID_INTEL_GLK_I2C6, - PCI_DEVICE_ID_INTEL_GLK_I2C7, - PCI_DEVICE_ID_INTEL_CNP_H_I2C0, - PCI_DEVICE_ID_INTEL_CNP_H_I2C1, - PCI_DEVICE_ID_INTEL_CNP_H_I2C2, - PCI_DEVICE_ID_INTEL_CNP_H_I2C3, - PCI_DEVICE_ID_INTEL_ICP_I2C0, - PCI_DEVICE_ID_INTEL_ICP_I2C1, - PCI_DEVICE_ID_INTEL_ICP_I2C2, - PCI_DEVICE_ID_INTEL_ICP_I2C3, - PCI_DEVICE_ID_INTEL_ICP_I2C4, - PCI_DEVICE_ID_INTEL_ICP_I2C5, - PCI_DEVICE_ID_INTEL_CMP_I2C0, - PCI_DEVICE_ID_INTEL_CMP_I2C1, - PCI_DEVICE_ID_INTEL_CMP_I2C2, - PCI_DEVICE_ID_INTEL_CMP_I2C3, - PCI_DEVICE_ID_INTEL_CMP_I2C4, - PCI_DEVICE_ID_INTEL_CMP_I2C5, - PCI_DEVICE_ID_INTEL_CMP_H_I2C0, - PCI_DEVICE_ID_INTEL_CMP_H_I2C1, - PCI_DEVICE_ID_INTEL_CMP_H_I2C2, - PCI_DEVICE_ID_INTEL_CMP_H_I2C3, - PCI_DEVICE_ID_INTEL_TGP_I2C0, - PCI_DEVICE_ID_INTEL_TGP_I2C1, - PCI_DEVICE_ID_INTEL_TGP_I2C2, - PCI_DEVICE_ID_INTEL_TGP_I2C3, - PCI_DEVICE_ID_INTEL_TGP_I2C4, - PCI_DEVICE_ID_INTEL_TGP_I2C5, - PCI_DEVICE_ID_INTEL_TGP_I2C6, - PCI_DEVICE_ID_INTEL_TGP_I2C7, - PCI_DEVICE_ID_INTEL_TGP_H_I2C0, - PCI_DEVICE_ID_INTEL_TGP_H_I2C1, - PCI_DEVICE_ID_INTEL_TGP_H_I2C2, - PCI_DEVICE_ID_INTEL_TGP_H_I2C3, - PCI_DEVICE_ID_INTEL_TGP_H_I2C4, - PCI_DEVICE_ID_INTEL_TGP_H_I2C5, - PCI_DEVICE_ID_INTEL_TGP_H_I2C6, - PCI_DEVICE_ID_INTEL_MCC_I2C0, - PCI_DEVICE_ID_INTEL_MCC_I2C1, - PCI_DEVICE_ID_INTEL_MCC_I2C2, - PCI_DEVICE_ID_INTEL_MCC_I2C3, - PCI_DEVICE_ID_INTEL_MCC_I2C4, - PCI_DEVICE_ID_INTEL_MCC_I2C5, - PCI_DEVICE_ID_INTEL_MCC_I2C6, - PCI_DEVICE_ID_INTEL_MCC_I2C7, - PCI_DEVICE_ID_INTEL_JSP_I2C0, - PCI_DEVICE_ID_INTEL_JSP_I2C1, - PCI_DEVICE_ID_INTEL_JSP_I2C2, - PCI_DEVICE_ID_INTEL_JSP_I2C3, - PCI_DEVICE_ID_INTEL_JSP_I2C4, - PCI_DEVICE_ID_INTEL_JSP_I2C5, - PCI_DEVICE_ID_INTEL_ADP_P_I2C0, - PCI_DEVICE_ID_INTEL_ADP_P_I2C1, - PCI_DEVICE_ID_INTEL_ADP_P_I2C2, - PCI_DEVICE_ID_INTEL_ADP_P_I2C3, - PCI_DEVICE_ID_INTEL_ADP_P_I2C4, - PCI_DEVICE_ID_INTEL_ADP_P_I2C5, - PCI_DEVICE_ID_INTEL_ADP_P_I2C6, - PCI_DEVICE_ID_INTEL_ADP_P_I2C7, - PCI_DEVICE_ID_INTEL_ADP_S_I2C0, - PCI_DEVICE_ID_INTEL_ADP_S_I2C1, - PCI_DEVICE_ID_INTEL_ADP_S_I2C2, - PCI_DEVICE_ID_INTEL_ADP_S_I2C3, - PCI_DEVICE_ID_INTEL_ADP_S_I2C4, - PCI_DEVICE_ID_INTEL_ADP_S_I2C5, - PCI_DEVICE_ID_INTEL_ADP_M_N_I2C0, - PCI_DEVICE_ID_INTEL_ADP_M_N_I2C1, - PCI_DEVICE_ID_INTEL_ADP_M_N_I2C2, - PCI_DEVICE_ID_INTEL_ADP_M_N_I2C3, - PCI_DEVICE_ID_INTEL_ADP_M_N_I2C4, - PCI_DEVICE_ID_INTEL_ADP_M_N_I2C5, + PCI_DID_INTEL_SPT_I2C0, + PCI_DID_INTEL_SPT_I2C1, + PCI_DID_INTEL_SPT_I2C2, + PCI_DID_INTEL_SPT_I2C3, + PCI_DID_INTEL_SPT_I2C4, + PCI_DID_INTEL_SPT_I2C5, + PCI_DID_INTEL_UPT_H_I2C0, + PCI_DID_INTEL_UPT_H_I2C1, + PCI_DID_INTEL_UPT_H_I2C2, + PCI_DID_INTEL_UPT_H_I2C3, + PCI_DID_INTEL_APL_I2C0, + PCI_DID_INTEL_APL_I2C1, + PCI_DID_INTEL_APL_I2C2, + PCI_DID_INTEL_APL_I2C3, + PCI_DID_INTEL_APL_I2C4, + PCI_DID_INTEL_APL_I2C5, + PCI_DID_INTEL_APL_I2C6, + PCI_DID_INTEL_APL_I2C7, + PCI_DID_INTEL_CNL_I2C0, + PCI_DID_INTEL_CNL_I2C1, + PCI_DID_INTEL_CNL_I2C2, + PCI_DID_INTEL_CNL_I2C3, + PCI_DID_INTEL_CNL_I2C4, + PCI_DID_INTEL_CNL_I2C5, + PCI_DID_INTEL_GLK_I2C0, + PCI_DID_INTEL_GLK_I2C1, + PCI_DID_INTEL_GLK_I2C2, + PCI_DID_INTEL_GLK_I2C3, + PCI_DID_INTEL_GLK_I2C4, + PCI_DID_INTEL_GLK_I2C5, + PCI_DID_INTEL_GLK_I2C6, + PCI_DID_INTEL_GLK_I2C7, + PCI_DID_INTEL_CNP_H_I2C0, + PCI_DID_INTEL_CNP_H_I2C1, + PCI_DID_INTEL_CNP_H_I2C2, + PCI_DID_INTEL_CNP_H_I2C3, + PCI_DID_INTEL_ICP_I2C0, + PCI_DID_INTEL_ICP_I2C1, + PCI_DID_INTEL_ICP_I2C2, + PCI_DID_INTEL_ICP_I2C3, + PCI_DID_INTEL_ICP_I2C4, + PCI_DID_INTEL_ICP_I2C5, + PCI_DID_INTEL_CMP_I2C0, + PCI_DID_INTEL_CMP_I2C1, + PCI_DID_INTEL_CMP_I2C2, + PCI_DID_INTEL_CMP_I2C3, + PCI_DID_INTEL_CMP_I2C4, + PCI_DID_INTEL_CMP_I2C5, + PCI_DID_INTEL_CMP_H_I2C0, + PCI_DID_INTEL_CMP_H_I2C1, + PCI_DID_INTEL_CMP_H_I2C2, + PCI_DID_INTEL_CMP_H_I2C3, + PCI_DID_INTEL_TGP_I2C0, + PCI_DID_INTEL_TGP_I2C1, + PCI_DID_INTEL_TGP_I2C2, + PCI_DID_INTEL_TGP_I2C3, + PCI_DID_INTEL_TGP_I2C4, + PCI_DID_INTEL_TGP_I2C5, + PCI_DID_INTEL_TGP_I2C6, + PCI_DID_INTEL_TGP_I2C7, + PCI_DID_INTEL_TGP_H_I2C0, + PCI_DID_INTEL_TGP_H_I2C1, + PCI_DID_INTEL_TGP_H_I2C2, + PCI_DID_INTEL_TGP_H_I2C3, + PCI_DID_INTEL_TGP_H_I2C4, + PCI_DID_INTEL_TGP_H_I2C5, + PCI_DID_INTEL_TGP_H_I2C6, + PCI_DID_INTEL_MCC_I2C0, + PCI_DID_INTEL_MCC_I2C1, + PCI_DID_INTEL_MCC_I2C2, + PCI_DID_INTEL_MCC_I2C3, + PCI_DID_INTEL_MCC_I2C4, + PCI_DID_INTEL_MCC_I2C5, + PCI_DID_INTEL_MCC_I2C6, + PCI_DID_INTEL_MCC_I2C7, + PCI_DID_INTEL_JSP_I2C0, + PCI_DID_INTEL_JSP_I2C1, + PCI_DID_INTEL_JSP_I2C2, + PCI_DID_INTEL_JSP_I2C3, + PCI_DID_INTEL_JSP_I2C4, + PCI_DID_INTEL_JSP_I2C5, + PCI_DID_INTEL_ADP_P_I2C0, + PCI_DID_INTEL_ADP_P_I2C1, + PCI_DID_INTEL_ADP_P_I2C2, + PCI_DID_INTEL_ADP_P_I2C3, + PCI_DID_INTEL_ADP_P_I2C4, + PCI_DID_INTEL_ADP_P_I2C5, + PCI_DID_INTEL_ADP_P_I2C6, + PCI_DID_INTEL_ADP_P_I2C7, + PCI_DID_INTEL_ADP_S_I2C0, + PCI_DID_INTEL_ADP_S_I2C1, + PCI_DID_INTEL_ADP_S_I2C2, + PCI_DID_INTEL_ADP_S_I2C3, + PCI_DID_INTEL_ADP_S_I2C4, + PCI_DID_INTEL_ADP_S_I2C5, + PCI_DID_INTEL_ADP_M_N_I2C0, + PCI_DID_INTEL_ADP_M_N_I2C1, + PCI_DID_INTEL_ADP_M_N_I2C2, + PCI_DID_INTEL_ADP_M_N_I2C3, + PCI_DID_INTEL_ADP_M_N_I2C4, + PCI_DID_INTEL_ADP_M_N_I2C5, 0, }; static const struct pci_driver pch_i2c __pci_driver = { .ops = &i2c_dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; #endif diff --git a/src/soc/intel/common/block/ipu/ipu.c b/src/soc/intel/common/block/ipu/ipu.c index a9d2bc093bed..ead4094af3b1 100644 --- a/src/soc/intel/common/block/ipu/ipu.c +++ b/src/soc/intel/common/block/ipu/ipu.c @@ -12,16 +12,16 @@ struct device_operations ipu_pci_ops = { }; static const uint16_t pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_TGL_IPU, - PCI_DEVICE_ID_INTEL_TGL_H_IPU, - PCI_DEVICE_ID_INTEL_JSL_IPU, - PCI_DEVICE_ID_INTEL_ADL_IPU, - PCI_DEVICE_ID_INTEL_ADL_N_IPU, + PCI_DID_INTEL_TGL_IPU, + PCI_DID_INTEL_TGL_H_IPU, + PCI_DID_INTEL_JSL_IPU, + PCI_DID_INTEL_ADL_IPU, + PCI_DID_INTEL_ADL_N_IPU, 0 }; static const struct pci_driver intel_ipu __pci_driver = { .ops = &ipu_pci_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 9706f92976b6..cd5cbe6f55b4 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -106,249 +106,249 @@ static struct device_operations device_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, - PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, - PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, - PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, - PCI_DEVICE_ID_INTEL_SPT_H_H110, - PCI_DEVICE_ID_INTEL_SPT_H_H170, - PCI_DEVICE_ID_INTEL_SPT_H_Z170, - PCI_DEVICE_ID_INTEL_SPT_H_Q170, - PCI_DEVICE_ID_INTEL_SPT_H_Q150, - PCI_DEVICE_ID_INTEL_SPT_H_B150, - PCI_DEVICE_ID_INTEL_SPT_H_C236, - PCI_DEVICE_ID_INTEL_SPT_H_C232, - PCI_DEVICE_ID_INTEL_SPT_H_QM170, - PCI_DEVICE_ID_INTEL_SPT_H_HM170, - PCI_DEVICE_ID_INTEL_SPT_H_CM236, - PCI_DEVICE_ID_INTEL_SPT_H_HM175, - PCI_DEVICE_ID_INTEL_SPT_H_QM175, - PCI_DEVICE_ID_INTEL_SPT_H_CM238, - PCI_DEVICE_ID_INTEL_LWB_C621, - PCI_DEVICE_ID_INTEL_LWB_C622, - PCI_DEVICE_ID_INTEL_LWB_C624, - PCI_DEVICE_ID_INTEL_LWB_C625, - PCI_DEVICE_ID_INTEL_LWB_C626, - PCI_DEVICE_ID_INTEL_LWB_C627, - PCI_DEVICE_ID_INTEL_LWB_C628, - PCI_DEVICE_ID_INTEL_LWB_C629, - PCI_DEVICE_ID_INTEL_LWB_C621A, - PCI_DEVICE_ID_INTEL_LWB_C627A, - PCI_DEVICE_ID_INTEL_LWB_C629A, - PCI_DEVICE_ID_INTEL_LWB_C624_SUPER, - PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_1, - PCI_DEVICE_ID_INTEL_LWB_C621_SUPER, - PCI_DEVICE_ID_INTEL_LWB_C627_SUPER_2, - PCI_DEVICE_ID_INTEL_LWB_C628_SUPER, - PCI_DEVICE_ID_INTEL_LWB_C621A_SUPER, - PCI_DEVICE_ID_INTEL_LWB_C627A_SUPER, - PCI_DEVICE_ID_INTEL_LWB_C629A_SUPER, - PCI_DEVICE_ID_INTEL_EMB_SUPER, - PCI_DEVICE_ID_INTEL_UPT_H_Q270, - PCI_DEVICE_ID_INTEL_UPT_H_H270, - PCI_DEVICE_ID_INTEL_UPT_H_Z270, - PCI_DEVICE_ID_INTEL_UPT_H_Q250, - PCI_DEVICE_ID_INTEL_UPT_H_B250, - PCI_DEVICE_ID_INTEL_UPT_H_Z370, - PCI_DEVICE_ID_INTEL_UPT_H_H310C, - PCI_DEVICE_ID_INTEL_UPT_H_B365, - PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, - PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, - PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, - PCI_DEVICE_ID_INTEL_UPT_LP_SUPER_SKU, - PCI_DEVICE_ID_INTEL_UPT_LP_U_BASE, - PCI_DEVICE_ID_INTEL_UPT_LP_U_PREMIUM, - PCI_DEVICE_ID_INTEL_UPT_LP_Y_PREMIUM, - PCI_DEVICE_ID_INTEL_APL_LPC, - PCI_DEVICE_ID_INTEL_GLK_LPC, - PCI_DEVICE_ID_INTEL_GLK_ESPI, - PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC, - PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC, - PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_H310, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_H370, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_Z390, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_B360, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_C242, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_HM370, - PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246, - PCI_DEVICE_ID_INTEL_ICL_BASE_U_ESPI, - PCI_DEVICE_ID_INTEL_ICL_BASE_Y_ESPI, - PCI_DEVICE_ID_INTEL_ICL_U_PREMIUM_ESPI, - PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI, - PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI_REV0, - PCI_DEVICE_ID_INTEL_ICL_SUPER_Y_ESPI, - PCI_DEVICE_ID_INTEL_ICL_Y_PREMIUM_ESPI, - PCI_DEVICE_ID_INTEL_CMP_SUPER_U_LPC, - PCI_DEVICE_ID_INTEL_CMP_PREMIUM_Y_LPC, - PCI_DEVICE_ID_INTEL_CMP_PREMIUM_U_LPC, - PCI_DEVICE_ID_INTEL_CMP_BASE_U_LPC, - PCI_DEVICE_ID_INTEL_CMP_SUPER_Y_LPC, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_HM470, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_WM490, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_QM480, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_W480, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_H470, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_Z490, - PCI_DEVICE_ID_INTEL_CMP_H_LPC_Q470, - PCI_DEVICE_ID_INTEL_TGP_ESPI_0, - PCI_DEVICE_ID_INTEL_TGP_SUPER_U_ESPI, - PCI_DEVICE_ID_INTEL_TGP_PREMIUM_U_ESPI, - PCI_DEVICE_ID_INTEL_TGP_BASE_U_ESPI, - PCI_DEVICE_ID_INTEL_TGP_ESPI_1, - PCI_DEVICE_ID_INTEL_TGP_ESPI_2, - PCI_DEVICE_ID_INTEL_TGP_SUPER_Y_ESPI, - PCI_DEVICE_ID_INTEL_TGP_PREMIUM_Y_ESPI, - PCI_DEVICE_ID_INTEL_TGP_ESPI_3, - PCI_DEVICE_ID_INTEL_TGP_ESPI_4, - PCI_DEVICE_ID_INTEL_TGP_ESPI_5, - PCI_DEVICE_ID_INTEL_TGP_ESPI_6, - PCI_DEVICE_ID_INTEL_TGP_ESPI_7, - PCI_DEVICE_ID_INTEL_TGP_ESPI_8, - PCI_DEVICE_ID_INTEL_TGP_ESPI_9, - PCI_DEVICE_ID_INTEL_TGP_ESPI_10, - PCI_DEVICE_ID_INTEL_TGP_ESPI_11, - PCI_DEVICE_ID_INTEL_TGP_ESPI_12, - PCI_DEVICE_ID_INTEL_TGP_ESPI_13, - PCI_DEVICE_ID_INTEL_TGP_ESPI_14, - PCI_DEVICE_ID_INTEL_TGP_ESPI_15, - PCI_DEVICE_ID_INTEL_TGP_ESPI_16, - PCI_DEVICE_ID_INTEL_TGP_ESPI_17, - PCI_DEVICE_ID_INTEL_TGP_ESPI_18, - PCI_DEVICE_ID_INTEL_TGP_ESPI_19, - PCI_DEVICE_ID_INTEL_TGP_ESPI_20, - PCI_DEVICE_ID_INTEL_TGP_ESPI_21, - PCI_DEVICE_ID_INTEL_TGP_ESPI_22, - PCI_DEVICE_ID_INTEL_TGP_ESPI_23, - PCI_DEVICE_ID_INTEL_TGP_ESPI_24, - PCI_DEVICE_ID_INTEL_TGP_ESPI_25, - PCI_DEVICE_ID_INTEL_TGP_ESPI_26, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580, - PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590, - PCI_DEVICE_ID_INTEL_MCC_ESPI_0, - PCI_DEVICE_ID_INTEL_MCC_ESPI_1, - PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI, - PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI, - PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI, - PCI_DEVICE_ID_INTEL_MCC_ESPI_2, - PCI_DEVICE_ID_INTEL_MCC_ESPI_3, - PCI_DEVICE_ID_INTEL_MCC_ESPI_4, - PCI_DEVICE_ID_INTEL_JSP_SUPER_ESPI, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_0, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_1, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_2, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_3, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_4, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_5, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_6, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_7, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_8, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_9, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_10, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_11, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_12, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_13, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_14, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_15, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_16, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_17, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_18, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_19, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_20, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_21, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_22, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_23, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_24, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_25, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_26, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_27, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_28, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_0, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_1, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_2, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_3, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_4, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_5, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_6, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_7, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_8, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_9, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_10, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_11, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_12, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_13, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_14, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_15, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_16, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_17, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_18, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_19, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_20, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_21, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_22, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_23, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_24, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_25, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_26, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_27, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_28, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_29, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_30, - PCI_DEVICE_ID_INTEL_ADP_S_ESPI_31, - PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_0, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_1, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_2, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_3, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_4, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_5, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_7, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_8, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_9, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_10, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_11, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_12, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_13, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_14, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_15, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_16, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_17, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_18, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_19, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_20, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_21, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_22, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_23, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_24, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_25, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_26, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_27, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_28, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_29, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_30, - PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_31, - PCI_DEVICE_ID_INTEL_ADP_M_ESPI_32, - PCI_DEVICE_ID_INTEL_SPR_ESPI_1, + PCI_DID_INTEL_SPT_LP_SAMPLE, + PCI_DID_INTEL_SPT_LP_U_BASE, + PCI_DID_INTEL_SPT_LP_U_PREMIUM, + PCI_DID_INTEL_SPT_LP_Y_PREMIUM, + PCI_DID_INTEL_SPT_H_H110, + PCI_DID_INTEL_SPT_H_H170, + PCI_DID_INTEL_SPT_H_Z170, + PCI_DID_INTEL_SPT_H_Q170, + PCI_DID_INTEL_SPT_H_Q150, + PCI_DID_INTEL_SPT_H_B150, + PCI_DID_INTEL_SPT_H_C236, + PCI_DID_INTEL_SPT_H_C232, + PCI_DID_INTEL_SPT_H_QM170, + PCI_DID_INTEL_SPT_H_HM170, + PCI_DID_INTEL_SPT_H_CM236, + PCI_DID_INTEL_SPT_H_HM175, + PCI_DID_INTEL_SPT_H_QM175, + PCI_DID_INTEL_SPT_H_CM238, + PCI_DID_INTEL_LWB_C621, + PCI_DID_INTEL_LWB_C622, + PCI_DID_INTEL_LWB_C624, + PCI_DID_INTEL_LWB_C625, + PCI_DID_INTEL_LWB_C626, + PCI_DID_INTEL_LWB_C627, + PCI_DID_INTEL_LWB_C628, + PCI_DID_INTEL_LWB_C629, + PCI_DID_INTEL_LWB_C621A, + PCI_DID_INTEL_LWB_C627A, + PCI_DID_INTEL_LWB_C629A, + PCI_DID_INTEL_LWB_C624_SUPER, + PCI_DID_INTEL_LWB_C627_SUPER_1, + PCI_DID_INTEL_LWB_C621_SUPER, + PCI_DID_INTEL_LWB_C627_SUPER_2, + PCI_DID_INTEL_LWB_C628_SUPER, + PCI_DID_INTEL_LWB_C621A_SUPER, + PCI_DID_INTEL_LWB_C627A_SUPER, + PCI_DID_INTEL_LWB_C629A_SUPER, + PCI_DID_INTEL_EMB_SUPER, + PCI_DID_INTEL_UPT_H_Q270, + PCI_DID_INTEL_UPT_H_H270, + PCI_DID_INTEL_UPT_H_Z270, + PCI_DID_INTEL_UPT_H_Q250, + PCI_DID_INTEL_UPT_H_B250, + PCI_DID_INTEL_UPT_H_Z370, + PCI_DID_INTEL_UPT_H_H310C, + PCI_DID_INTEL_UPT_H_B365, + PCI_DID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, + PCI_DID_INTEL_SPT_LP_U_PREMIUM_HDCP22, + PCI_DID_INTEL_SPT_LP_U_BASE_HDCP22, + PCI_DID_INTEL_UPT_LP_SUPER_SKU, + PCI_DID_INTEL_UPT_LP_U_BASE, + PCI_DID_INTEL_UPT_LP_U_PREMIUM, + PCI_DID_INTEL_UPT_LP_Y_PREMIUM, + PCI_DID_INTEL_APL_LPC, + PCI_DID_INTEL_GLK_LPC, + PCI_DID_INTEL_GLK_ESPI, + PCI_DID_INTEL_CNL_BASE_U_LPC, + PCI_DID_INTEL_CNL_U_PREMIUM_LPC, + PCI_DID_INTEL_CNL_Y_PREMIUM_LPC, + PCI_DID_INTEL_CNP_H_LPC_H310, + PCI_DID_INTEL_CNP_H_LPC_H370, + PCI_DID_INTEL_CNP_H_LPC_Z390, + PCI_DID_INTEL_CNP_H_LPC_Q370, + PCI_DID_INTEL_CNP_H_LPC_B360, + PCI_DID_INTEL_CNP_H_LPC_C246, + PCI_DID_INTEL_CNP_H_LPC_C242, + PCI_DID_INTEL_CNP_H_LPC_QM370, + PCI_DID_INTEL_CNP_H_LPC_HM370, + PCI_DID_INTEL_CNP_H_LPC_CM246, + PCI_DID_INTEL_ICL_BASE_U_ESPI, + PCI_DID_INTEL_ICL_BASE_Y_ESPI, + PCI_DID_INTEL_ICL_U_PREMIUM_ESPI, + PCI_DID_INTEL_ICL_U_SUPER_U_ESPI, + PCI_DID_INTEL_ICL_U_SUPER_U_ESPI_REV0, + PCI_DID_INTEL_ICL_SUPER_Y_ESPI, + PCI_DID_INTEL_ICL_Y_PREMIUM_ESPI, + PCI_DID_INTEL_CMP_SUPER_U_LPC, + PCI_DID_INTEL_CMP_PREMIUM_Y_LPC, + PCI_DID_INTEL_CMP_PREMIUM_U_LPC, + PCI_DID_INTEL_CMP_BASE_U_LPC, + PCI_DID_INTEL_CMP_SUPER_Y_LPC, + PCI_DID_INTEL_CMP_H_LPC_HM470, + PCI_DID_INTEL_CMP_H_LPC_WM490, + PCI_DID_INTEL_CMP_H_LPC_QM480, + PCI_DID_INTEL_CMP_H_LPC_W480, + PCI_DID_INTEL_CMP_H_LPC_H470, + PCI_DID_INTEL_CMP_H_LPC_Z490, + PCI_DID_INTEL_CMP_H_LPC_Q470, + PCI_DID_INTEL_TGP_ESPI_0, + PCI_DID_INTEL_TGP_SUPER_U_ESPI, + PCI_DID_INTEL_TGP_PREMIUM_U_ESPI, + PCI_DID_INTEL_TGP_BASE_U_ESPI, + PCI_DID_INTEL_TGP_ESPI_1, + PCI_DID_INTEL_TGP_ESPI_2, + PCI_DID_INTEL_TGP_SUPER_Y_ESPI, + PCI_DID_INTEL_TGP_PREMIUM_Y_ESPI, + PCI_DID_INTEL_TGP_ESPI_3, + PCI_DID_INTEL_TGP_ESPI_4, + PCI_DID_INTEL_TGP_ESPI_5, + PCI_DID_INTEL_TGP_ESPI_6, + PCI_DID_INTEL_TGP_ESPI_7, + PCI_DID_INTEL_TGP_ESPI_8, + PCI_DID_INTEL_TGP_ESPI_9, + PCI_DID_INTEL_TGP_ESPI_10, + PCI_DID_INTEL_TGP_ESPI_11, + PCI_DID_INTEL_TGP_ESPI_12, + PCI_DID_INTEL_TGP_ESPI_13, + PCI_DID_INTEL_TGP_ESPI_14, + PCI_DID_INTEL_TGP_ESPI_15, + PCI_DID_INTEL_TGP_ESPI_16, + PCI_DID_INTEL_TGP_ESPI_17, + PCI_DID_INTEL_TGP_ESPI_18, + PCI_DID_INTEL_TGP_ESPI_19, + PCI_DID_INTEL_TGP_ESPI_20, + PCI_DID_INTEL_TGP_ESPI_21, + PCI_DID_INTEL_TGP_ESPI_22, + PCI_DID_INTEL_TGP_ESPI_23, + PCI_DID_INTEL_TGP_ESPI_24, + PCI_DID_INTEL_TGP_ESPI_25, + PCI_DID_INTEL_TGP_ESPI_26, + PCI_DID_INTEL_TGP_H_ESPI_B560, + PCI_DID_INTEL_TGP_H_ESPI_H510, + PCI_DID_INTEL_TGP_H_ESPI_H570, + PCI_DID_INTEL_TGP_H_ESPI_Q570, + PCI_DID_INTEL_TGP_H_ESPI_W580, + PCI_DID_INTEL_TGP_H_ESPI_Z590, + PCI_DID_INTEL_TGP_H_ESPI_HM570, + PCI_DID_INTEL_TGP_H_ESPI_QM580, + PCI_DID_INTEL_TGP_H_ESPI_WM590, + PCI_DID_INTEL_MCC_ESPI_0, + PCI_DID_INTEL_MCC_ESPI_1, + PCI_DID_INTEL_MCC_BASE_ESPI, + PCI_DID_INTEL_MCC_PREMIUM_ESPI, + PCI_DID_INTEL_MCC_SUPER_ESPI, + PCI_DID_INTEL_MCC_ESPI_2, + PCI_DID_INTEL_MCC_ESPI_3, + PCI_DID_INTEL_MCC_ESPI_4, + PCI_DID_INTEL_JSP_SUPER_ESPI, + PCI_DID_INTEL_ADP_P_ESPI_0, + PCI_DID_INTEL_ADP_P_ESPI_1, + PCI_DID_INTEL_ADP_P_ESPI_2, + PCI_DID_INTEL_ADP_P_ESPI_3, + PCI_DID_INTEL_ADP_P_ESPI_4, + PCI_DID_INTEL_ADP_P_ESPI_5, + PCI_DID_INTEL_ADP_P_ESPI_6, + PCI_DID_INTEL_ADP_P_ESPI_7, + PCI_DID_INTEL_ADP_P_ESPI_8, + PCI_DID_INTEL_ADP_P_ESPI_9, + PCI_DID_INTEL_ADP_P_ESPI_10, + PCI_DID_INTEL_ADP_P_ESPI_11, + PCI_DID_INTEL_ADP_P_ESPI_12, + PCI_DID_INTEL_ADP_P_ESPI_13, + PCI_DID_INTEL_ADP_P_ESPI_14, + PCI_DID_INTEL_ADP_P_ESPI_15, + PCI_DID_INTEL_ADP_P_ESPI_16, + PCI_DID_INTEL_ADP_P_ESPI_17, + PCI_DID_INTEL_ADP_P_ESPI_18, + PCI_DID_INTEL_ADP_P_ESPI_19, + PCI_DID_INTEL_ADP_P_ESPI_20, + PCI_DID_INTEL_ADP_P_ESPI_21, + PCI_DID_INTEL_ADP_P_ESPI_22, + PCI_DID_INTEL_ADP_P_ESPI_23, + PCI_DID_INTEL_ADP_P_ESPI_24, + PCI_DID_INTEL_ADP_P_ESPI_25, + PCI_DID_INTEL_ADP_P_ESPI_26, + PCI_DID_INTEL_ADP_P_ESPI_27, + PCI_DID_INTEL_ADP_P_ESPI_28, + PCI_DID_INTEL_ADP_P_ESPI_29, + PCI_DID_INTEL_ADP_P_ESPI_30, + PCI_DID_INTEL_ADP_P_ESPI_31, + PCI_DID_INTEL_ADP_P_ESPI_32, + PCI_DID_INTEL_ADP_P_ESPI_33, + PCI_DID_INTEL_ADP_S_ESPI_0, + PCI_DID_INTEL_ADP_S_ESPI_1, + PCI_DID_INTEL_ADP_S_ESPI_2, + PCI_DID_INTEL_ADP_S_ESPI_3, + PCI_DID_INTEL_ADP_S_ESPI_4, + PCI_DID_INTEL_ADP_S_ESPI_5, + PCI_DID_INTEL_ADP_S_ESPI_6, + PCI_DID_INTEL_ADP_S_ESPI_7, + PCI_DID_INTEL_ADP_S_ESPI_8, + PCI_DID_INTEL_ADP_S_ESPI_9, + PCI_DID_INTEL_ADP_S_ESPI_10, + PCI_DID_INTEL_ADP_S_ESPI_11, + PCI_DID_INTEL_ADP_S_ESPI_12, + PCI_DID_INTEL_ADP_S_ESPI_13, + PCI_DID_INTEL_ADP_S_ESPI_14, + PCI_DID_INTEL_ADP_S_ESPI_15, + PCI_DID_INTEL_ADP_S_ESPI_16, + PCI_DID_INTEL_ADP_S_ESPI_17, + PCI_DID_INTEL_ADP_S_ESPI_18, + PCI_DID_INTEL_ADP_S_ESPI_19, + PCI_DID_INTEL_ADP_S_ESPI_20, + PCI_DID_INTEL_ADP_S_ESPI_21, + PCI_DID_INTEL_ADP_S_ESPI_22, + PCI_DID_INTEL_ADP_S_ESPI_23, + PCI_DID_INTEL_ADP_S_ESPI_24, + PCI_DID_INTEL_ADP_S_ESPI_25, + PCI_DID_INTEL_ADP_S_ESPI_26, + PCI_DID_INTEL_ADP_S_ESPI_27, + PCI_DID_INTEL_ADP_S_ESPI_28, + PCI_DID_INTEL_ADP_S_ESPI_29, + PCI_DID_INTEL_ADP_S_ESPI_30, + PCI_DID_INTEL_ADP_S_ESPI_31, + PCI_DID_INTEL_ADP_P_ESPI_32, + PCI_DID_INTEL_ADP_M_N_ESPI_0, + PCI_DID_INTEL_ADP_M_N_ESPI_1, + PCI_DID_INTEL_ADP_M_N_ESPI_2, + PCI_DID_INTEL_ADP_M_N_ESPI_3, + PCI_DID_INTEL_ADP_M_N_ESPI_4, + PCI_DID_INTEL_ADP_M_N_ESPI_5, + PCI_DID_INTEL_ADP_M_N_ESPI_7, + PCI_DID_INTEL_ADP_M_N_ESPI_8, + PCI_DID_INTEL_ADP_M_N_ESPI_9, + PCI_DID_INTEL_ADP_M_N_ESPI_10, + PCI_DID_INTEL_ADP_M_N_ESPI_11, + PCI_DID_INTEL_ADP_M_N_ESPI_12, + PCI_DID_INTEL_ADP_M_N_ESPI_13, + PCI_DID_INTEL_ADP_M_N_ESPI_14, + PCI_DID_INTEL_ADP_M_N_ESPI_15, + PCI_DID_INTEL_ADP_M_N_ESPI_16, + PCI_DID_INTEL_ADP_M_N_ESPI_17, + PCI_DID_INTEL_ADP_M_N_ESPI_18, + PCI_DID_INTEL_ADP_M_N_ESPI_19, + PCI_DID_INTEL_ADP_M_N_ESPI_20, + PCI_DID_INTEL_ADP_M_N_ESPI_21, + PCI_DID_INTEL_ADP_M_N_ESPI_22, + PCI_DID_INTEL_ADP_M_N_ESPI_23, + PCI_DID_INTEL_ADP_M_N_ESPI_24, + PCI_DID_INTEL_ADP_M_N_ESPI_25, + PCI_DID_INTEL_ADP_M_N_ESPI_26, + PCI_DID_INTEL_ADP_M_N_ESPI_27, + PCI_DID_INTEL_ADP_M_N_ESPI_28, + PCI_DID_INTEL_ADP_M_N_ESPI_29, + PCI_DID_INTEL_ADP_M_N_ESPI_30, + PCI_DID_INTEL_ADP_M_N_ESPI_31, + PCI_DID_INTEL_ADP_M_ESPI_32, + PCI_DID_INTEL_SPR_ESPI_1, 0 }; static const struct pci_driver pch_lpc __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 16da6911c999..03c341a26d28 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -144,30 +144,30 @@ static const struct device_operations device_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_P2SB, - PCI_DEVICE_ID_INTEL_GLK_P2SB, - PCI_DEVICE_ID_INTEL_LWB_P2SB, - PCI_DEVICE_ID_INTEL_LWB_P2SB_SUPER, - PCI_DEVICE_ID_INTEL_SKL_LP_P2SB, - PCI_DEVICE_ID_INTEL_SKL_P2SB, - PCI_DEVICE_ID_INTEL_KBL_P2SB, - PCI_DEVICE_ID_INTEL_CNL_P2SB, - PCI_DEVICE_ID_INTEL_CNP_H_P2SB, - PCI_DEVICE_ID_INTEL_ICL_P2SB, - PCI_DEVICE_ID_INTEL_CMP_P2SB, - PCI_DEVICE_ID_INTEL_CMP_H_P2SB, - PCI_DEVICE_ID_INTEL_TGL_P2SB, - PCI_DEVICE_ID_INTEL_TGL_H_P2SB, - PCI_DEVICE_ID_INTEL_EHL_P2SB, - PCI_DEVICE_ID_INTEL_JSP_P2SB, - PCI_DEVICE_ID_INTEL_ADP_P_P2SB, - PCI_DEVICE_ID_INTEL_ADP_S_P2SB, - PCI_DEVICE_ID_INTEL_ADP_M_P2SB, + PCI_DID_INTEL_APL_P2SB, + PCI_DID_INTEL_GLK_P2SB, + PCI_DID_INTEL_LWB_P2SB, + PCI_DID_INTEL_LWB_P2SB_SUPER, + PCI_DID_INTEL_SKL_LP_P2SB, + PCI_DID_INTEL_SKL_P2SB, + PCI_DID_INTEL_KBL_P2SB, + PCI_DID_INTEL_CNL_P2SB, + PCI_DID_INTEL_CNP_H_P2SB, + PCI_DID_INTEL_ICL_P2SB, + PCI_DID_INTEL_CMP_P2SB, + PCI_DID_INTEL_CMP_H_P2SB, + PCI_DID_INTEL_TGL_P2SB, + PCI_DID_INTEL_TGL_H_P2SB, + PCI_DID_INTEL_EHL_P2SB, + PCI_DID_INTEL_JSP_P2SB, + PCI_DID_INTEL_ADP_P_P2SB, + PCI_DID_INTEL_ADP_S_P2SB, + PCI_DID_INTEL_ADP_M_P2SB, 0, }; static const struct pci_driver pmc __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/p2sb/p2sblib.c b/src/soc/intel/common/block/p2sb/p2sblib.c index d00606dd8927..faef79adfd15 100644 --- a/src/soc/intel/common/block/p2sb/p2sblib.c +++ b/src/soc/intel/common/block/p2sb/p2sblib.c @@ -16,7 +16,7 @@ bool p2sb_dev_is_hidden(pci_devfn_t dev) if (pci_vid == 0xffff) return true; - if (pci_vid == PCI_VENDOR_ID_INTEL) + if (pci_vid == PCI_VID_INTEL) return false; printk(BIOS_ERR, "P2SB PCI_VENDOR_ID is invalid, unknown if hidden\n"); return true; diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index b17a1f37ced5..1ac879c6615b 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -66,313 +66,313 @@ static struct device_operations device_ops = { }; static const unsigned short pcie_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP2, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP3, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP4, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP5, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP6, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP7, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP8, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP9, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP10, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP11, - PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP12, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP1, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP2, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP3, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP4, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP5, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP6, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP7, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP8, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP9, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP10, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP11, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP12, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP13, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP14, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP15, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP16, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP17, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP18, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP19, - PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP20, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP1, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP2, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP3, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP4, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP5, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP6, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP7, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP8, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP9, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP10, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP11, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP12, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP13, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP14, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP15, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP16, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP17, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP1_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP2_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP3_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP4_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP5_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP6_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP7_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP8_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP9_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP10_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP11_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP12_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP13_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP14_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP15_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP16_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP17_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19_SUPER, - PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20_SUPER, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP1, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP2, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP3, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP4, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP5, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP6, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP7, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP8, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP9, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP10, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP11, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP12, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP13, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP14, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP15, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP16, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP17, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP18, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP19, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP20, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP21, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP22, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP23, - PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP24, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP1, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP2, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP3, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP4, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP5, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP6, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP7, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP8, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP9, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP10, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP11, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP12, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP13, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP14, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP15, - PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP16, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP1, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP2, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP3, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP4, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP5, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP6, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP7, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP8, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP9, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP10, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP11, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP12, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP13, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP14, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP15, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP16, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP17, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP18, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP19, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP20, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP21, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP22, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP23, - PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP24, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP1, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP2, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP3, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP4, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP5, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP6, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP7, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP8, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP9, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP10, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP11, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP12, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP13, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP14, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP15, - PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP16, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP1, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP2, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP3, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP4, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP5, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP6, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP7, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP8, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP9, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP10, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP11, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP12, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP13, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP14, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15, - PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP1, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP2, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP3, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP4, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP5, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP6, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP7, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP8, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP9, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP10, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP11, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP12, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP13, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP14, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP15, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP16, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP17, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP18, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP19, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP20, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP21, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP22, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP23, - PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP24, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP1, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP2, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP3, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP4, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP5, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP6, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP7, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP8, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP9, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP10, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP11, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP12, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP13, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP14, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15, - PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP1, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP2, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP3, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP4, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP5, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP6, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP7, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP8, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP9, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP10, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP11, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP12, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP13, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP14, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP15, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP16, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP17, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP18, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP19, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP20, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP21, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP22, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP23, - PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP24, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP1, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP2, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP3, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP4, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP5, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6, - PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP1, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP2, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP3, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP4, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP5, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP6, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP7, - PCI_DEVICE_ID_INTEL_JSP_PCIE_RP8, - PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP1, - PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP2, - PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP3, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP4, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP5, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP6, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP7, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP8, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP9, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP10, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP11, - PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP12, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP1, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP2, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP3, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP4, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP5, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP6, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP7, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP8, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP9, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP10, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP11, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP12, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP13, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP14, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP15, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP16, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP17, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP18, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP19, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP20, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP21, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP22, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP23, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP24, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP25, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP26, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP27, - PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP28, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP1, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP2, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP3, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP4, - PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP5, - PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP6, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP7, - PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP9, - PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP10, - PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP11, - PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP12, + PCI_DID_INTEL_SPT_LP_PCIE_RP1, + PCI_DID_INTEL_SPT_LP_PCIE_RP2, + PCI_DID_INTEL_SPT_LP_PCIE_RP3, + PCI_DID_INTEL_SPT_LP_PCIE_RP4, + PCI_DID_INTEL_SPT_LP_PCIE_RP5, + PCI_DID_INTEL_SPT_LP_PCIE_RP6, + PCI_DID_INTEL_SPT_LP_PCIE_RP7, + PCI_DID_INTEL_SPT_LP_PCIE_RP8, + PCI_DID_INTEL_SPT_LP_PCIE_RP9, + PCI_DID_INTEL_SPT_LP_PCIE_RP10, + PCI_DID_INTEL_SPT_LP_PCIE_RP11, + PCI_DID_INTEL_SPT_LP_PCIE_RP12, + PCI_DID_INTEL_SPT_H_PCIE_RP1, + PCI_DID_INTEL_SPT_H_PCIE_RP2, + PCI_DID_INTEL_SPT_H_PCIE_RP3, + PCI_DID_INTEL_SPT_H_PCIE_RP4, + PCI_DID_INTEL_SPT_H_PCIE_RP5, + PCI_DID_INTEL_SPT_H_PCIE_RP6, + PCI_DID_INTEL_SPT_H_PCIE_RP7, + PCI_DID_INTEL_SPT_H_PCIE_RP8, + PCI_DID_INTEL_SPT_H_PCIE_RP9, + PCI_DID_INTEL_SPT_H_PCIE_RP10, + PCI_DID_INTEL_SPT_H_PCIE_RP11, + PCI_DID_INTEL_SPT_H_PCIE_RP12, + PCI_DID_INTEL_SPT_H_PCIE_RP13, + PCI_DID_INTEL_SPT_H_PCIE_RP14, + PCI_DID_INTEL_SPT_H_PCIE_RP15, + PCI_DID_INTEL_SPT_H_PCIE_RP16, + PCI_DID_INTEL_SPT_H_PCIE_RP17, + PCI_DID_INTEL_SPT_H_PCIE_RP18, + PCI_DID_INTEL_SPT_H_PCIE_RP19, + PCI_DID_INTEL_SPT_H_PCIE_RP20, + PCI_DID_INTEL_LWB_PCIE_RP1, + PCI_DID_INTEL_LWB_PCIE_RP2, + PCI_DID_INTEL_LWB_PCIE_RP3, + PCI_DID_INTEL_LWB_PCIE_RP4, + PCI_DID_INTEL_LWB_PCIE_RP5, + PCI_DID_INTEL_LWB_PCIE_RP6, + PCI_DID_INTEL_LWB_PCIE_RP7, + PCI_DID_INTEL_LWB_PCIE_RP8, + PCI_DID_INTEL_LWB_PCIE_RP9, + PCI_DID_INTEL_LWB_PCIE_RP10, + PCI_DID_INTEL_LWB_PCIE_RP11, + PCI_DID_INTEL_LWB_PCIE_RP12, + PCI_DID_INTEL_LWB_PCIE_RP13, + PCI_DID_INTEL_LWB_PCIE_RP14, + PCI_DID_INTEL_LWB_PCIE_RP15, + PCI_DID_INTEL_LWB_PCIE_RP16, + PCI_DID_INTEL_LWB_PCIE_RP17, + PCI_DID_INTEL_LWB_PCIE_RP18, + PCI_DID_INTEL_LWB_PCIE_RP19, + PCI_DID_INTEL_LWB_PCIE_RP20, + PCI_DID_INTEL_LWB_PCIE_RP1_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP2_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP3_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP4_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP5_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP6_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP7_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP8_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP9_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP10_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP11_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP12_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP13_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP14_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP15_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP16_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP17_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP18_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP19_SUPER, + PCI_DID_INTEL_LWB_PCIE_RP20_SUPER, + PCI_DID_INTEL_UPT_H_PCIE_RP1, + PCI_DID_INTEL_UPT_H_PCIE_RP2, + PCI_DID_INTEL_UPT_H_PCIE_RP3, + PCI_DID_INTEL_UPT_H_PCIE_RP4, + PCI_DID_INTEL_UPT_H_PCIE_RP5, + PCI_DID_INTEL_UPT_H_PCIE_RP6, + PCI_DID_INTEL_UPT_H_PCIE_RP7, + PCI_DID_INTEL_UPT_H_PCIE_RP8, + PCI_DID_INTEL_UPT_H_PCIE_RP9, + PCI_DID_INTEL_UPT_H_PCIE_RP10, + PCI_DID_INTEL_UPT_H_PCIE_RP11, + PCI_DID_INTEL_UPT_H_PCIE_RP12, + PCI_DID_INTEL_UPT_H_PCIE_RP13, + PCI_DID_INTEL_UPT_H_PCIE_RP14, + PCI_DID_INTEL_UPT_H_PCIE_RP15, + PCI_DID_INTEL_UPT_H_PCIE_RP16, + PCI_DID_INTEL_UPT_H_PCIE_RP17, + PCI_DID_INTEL_UPT_H_PCIE_RP18, + PCI_DID_INTEL_UPT_H_PCIE_RP19, + PCI_DID_INTEL_UPT_H_PCIE_RP20, + PCI_DID_INTEL_UPT_H_PCIE_RP21, + PCI_DID_INTEL_UPT_H_PCIE_RP22, + PCI_DID_INTEL_UPT_H_PCIE_RP23, + PCI_DID_INTEL_UPT_H_PCIE_RP24, + PCI_DID_INTEL_CNL_LP_PCIE_RP1, + PCI_DID_INTEL_CNL_LP_PCIE_RP2, + PCI_DID_INTEL_CNL_LP_PCIE_RP3, + PCI_DID_INTEL_CNL_LP_PCIE_RP4, + PCI_DID_INTEL_CNL_LP_PCIE_RP5, + PCI_DID_INTEL_CNL_LP_PCIE_RP6, + PCI_DID_INTEL_CNL_LP_PCIE_RP7, + PCI_DID_INTEL_CNL_LP_PCIE_RP8, + PCI_DID_INTEL_CNL_LP_PCIE_RP9, + PCI_DID_INTEL_CNL_LP_PCIE_RP10, + PCI_DID_INTEL_CNL_LP_PCIE_RP11, + PCI_DID_INTEL_CNL_LP_PCIE_RP12, + PCI_DID_INTEL_CNL_LP_PCIE_RP13, + PCI_DID_INTEL_CNL_LP_PCIE_RP14, + PCI_DID_INTEL_CNL_LP_PCIE_RP15, + PCI_DID_INTEL_CNL_LP_PCIE_RP16, + PCI_DID_INTEL_CNP_H_PCIE_RP1, + PCI_DID_INTEL_CNP_H_PCIE_RP2, + PCI_DID_INTEL_CNP_H_PCIE_RP3, + PCI_DID_INTEL_CNP_H_PCIE_RP4, + PCI_DID_INTEL_CNP_H_PCIE_RP5, + PCI_DID_INTEL_CNP_H_PCIE_RP6, + PCI_DID_INTEL_CNP_H_PCIE_RP7, + PCI_DID_INTEL_CNP_H_PCIE_RP8, + PCI_DID_INTEL_CNP_H_PCIE_RP9, + PCI_DID_INTEL_CNP_H_PCIE_RP10, + PCI_DID_INTEL_CNP_H_PCIE_RP11, + PCI_DID_INTEL_CNP_H_PCIE_RP12, + PCI_DID_INTEL_CNP_H_PCIE_RP13, + PCI_DID_INTEL_CNP_H_PCIE_RP14, + PCI_DID_INTEL_CNP_H_PCIE_RP15, + PCI_DID_INTEL_CNP_H_PCIE_RP16, + PCI_DID_INTEL_CNP_H_PCIE_RP17, + PCI_DID_INTEL_CNP_H_PCIE_RP18, + PCI_DID_INTEL_CNP_H_PCIE_RP19, + PCI_DID_INTEL_CNP_H_PCIE_RP20, + PCI_DID_INTEL_CNP_H_PCIE_RP21, + PCI_DID_INTEL_CNP_H_PCIE_RP22, + PCI_DID_INTEL_CNP_H_PCIE_RP23, + PCI_DID_INTEL_CNP_H_PCIE_RP24, + PCI_DID_INTEL_ICP_LP_PCIE_RP1, + PCI_DID_INTEL_ICP_LP_PCIE_RP2, + PCI_DID_INTEL_ICP_LP_PCIE_RP3, + PCI_DID_INTEL_ICP_LP_PCIE_RP4, + PCI_DID_INTEL_ICP_LP_PCIE_RP5, + PCI_DID_INTEL_ICP_LP_PCIE_RP6, + PCI_DID_INTEL_ICP_LP_PCIE_RP7, + PCI_DID_INTEL_ICP_LP_PCIE_RP8, + PCI_DID_INTEL_ICP_LP_PCIE_RP9, + PCI_DID_INTEL_ICP_LP_PCIE_RP10, + PCI_DID_INTEL_ICP_LP_PCIE_RP11, + PCI_DID_INTEL_ICP_LP_PCIE_RP12, + PCI_DID_INTEL_ICP_LP_PCIE_RP13, + PCI_DID_INTEL_ICP_LP_PCIE_RP14, + PCI_DID_INTEL_ICP_LP_PCIE_RP15, + PCI_DID_INTEL_ICP_LP_PCIE_RP16, + PCI_DID_INTEL_CMP_LP_PCIE_RP1, + PCI_DID_INTEL_CMP_LP_PCIE_RP2, + PCI_DID_INTEL_CMP_LP_PCIE_RP3, + PCI_DID_INTEL_CMP_LP_PCIE_RP4, + PCI_DID_INTEL_CMP_LP_PCIE_RP5, + PCI_DID_INTEL_CMP_LP_PCIE_RP6, + PCI_DID_INTEL_CMP_LP_PCIE_RP7, + PCI_DID_INTEL_CMP_LP_PCIE_RP8, + PCI_DID_INTEL_CMP_LP_PCIE_RP9, + PCI_DID_INTEL_CMP_LP_PCIE_RP10, + PCI_DID_INTEL_CMP_LP_PCIE_RP11, + PCI_DID_INTEL_CMP_LP_PCIE_RP12, + PCI_DID_INTEL_CMP_LP_PCIE_RP13, + PCI_DID_INTEL_CMP_LP_PCIE_RP14, + PCI_DID_INTEL_CMP_LP_PCIE_RP15, + PCI_DID_INTEL_CMP_LP_PCIE_RP16, + PCI_DID_INTEL_CMP_H_PCIE_RP1, + PCI_DID_INTEL_CMP_H_PCIE_RP2, + PCI_DID_INTEL_CMP_H_PCIE_RP3, + PCI_DID_INTEL_CMP_H_PCIE_RP4, + PCI_DID_INTEL_CMP_H_PCIE_RP5, + PCI_DID_INTEL_CMP_H_PCIE_RP6, + PCI_DID_INTEL_CMP_H_PCIE_RP7, + PCI_DID_INTEL_CMP_H_PCIE_RP8, + PCI_DID_INTEL_CMP_H_PCIE_RP9, + PCI_DID_INTEL_CMP_H_PCIE_RP10, + PCI_DID_INTEL_CMP_H_PCIE_RP11, + PCI_DID_INTEL_CMP_H_PCIE_RP12, + PCI_DID_INTEL_CMP_H_PCIE_RP13, + PCI_DID_INTEL_CMP_H_PCIE_RP14, + PCI_DID_INTEL_CMP_H_PCIE_RP15, + PCI_DID_INTEL_CMP_H_PCIE_RP16, + PCI_DID_INTEL_CMP_H_PCIE_RP17, + PCI_DID_INTEL_CMP_H_PCIE_RP18, + PCI_DID_INTEL_CMP_H_PCIE_RP19, + PCI_DID_INTEL_CMP_H_PCIE_RP20, + PCI_DID_INTEL_CMP_H_PCIE_RP21, + PCI_DID_INTEL_CMP_H_PCIE_RP22, + PCI_DID_INTEL_CMP_H_PCIE_RP23, + PCI_DID_INTEL_CMP_H_PCIE_RP24, + PCI_DID_INTEL_TGP_LP_PCIE_RP1, + PCI_DID_INTEL_TGP_LP_PCIE_RP2, + PCI_DID_INTEL_TGP_LP_PCIE_RP3, + PCI_DID_INTEL_TGP_LP_PCIE_RP4, + PCI_DID_INTEL_TGP_LP_PCIE_RP5, + PCI_DID_INTEL_TGP_LP_PCIE_RP6, + PCI_DID_INTEL_TGP_LP_PCIE_RP7, + PCI_DID_INTEL_TGP_LP_PCIE_RP8, + PCI_DID_INTEL_TGP_LP_PCIE_RP9, + PCI_DID_INTEL_TGP_LP_PCIE_RP10, + PCI_DID_INTEL_TGP_LP_PCIE_RP11, + PCI_DID_INTEL_TGP_LP_PCIE_RP12, + PCI_DID_INTEL_TGP_LP_PCIE_RP13, + PCI_DID_INTEL_TGP_LP_PCIE_RP14, + PCI_DID_INTEL_TGP_LP_PCIE_RP15, + PCI_DID_INTEL_TGP_LP_PCIE_RP16, + PCI_DID_INTEL_TGP_H_PCIE_RP1, + PCI_DID_INTEL_TGP_H_PCIE_RP2, + PCI_DID_INTEL_TGP_H_PCIE_RP3, + PCI_DID_INTEL_TGP_H_PCIE_RP4, + PCI_DID_INTEL_TGP_H_PCIE_RP5, + PCI_DID_INTEL_TGP_H_PCIE_RP6, + PCI_DID_INTEL_TGP_H_PCIE_RP7, + PCI_DID_INTEL_TGP_H_PCIE_RP8, + PCI_DID_INTEL_TGP_H_PCIE_RP9, + PCI_DID_INTEL_TGP_H_PCIE_RP10, + PCI_DID_INTEL_TGP_H_PCIE_RP11, + PCI_DID_INTEL_TGP_H_PCIE_RP12, + PCI_DID_INTEL_TGP_H_PCIE_RP13, + PCI_DID_INTEL_TGP_H_PCIE_RP14, + PCI_DID_INTEL_TGP_H_PCIE_RP15, + PCI_DID_INTEL_TGP_H_PCIE_RP16, + PCI_DID_INTEL_TGP_H_PCIE_RP17, + PCI_DID_INTEL_TGP_H_PCIE_RP18, + PCI_DID_INTEL_TGP_H_PCIE_RP19, + PCI_DID_INTEL_TGP_H_PCIE_RP20, + PCI_DID_INTEL_TGP_H_PCIE_RP21, + PCI_DID_INTEL_TGP_H_PCIE_RP22, + PCI_DID_INTEL_TGP_H_PCIE_RP23, + PCI_DID_INTEL_TGP_H_PCIE_RP24, + PCI_DID_INTEL_MCC_PCIE_RP1, + PCI_DID_INTEL_MCC_PCIE_RP2, + PCI_DID_INTEL_MCC_PCIE_RP3, + PCI_DID_INTEL_MCC_PCIE_RP4, + PCI_DID_INTEL_MCC_PCIE_RP5, + PCI_DID_INTEL_MCC_PCIE_RP6, + PCI_DID_INTEL_MCC_PCIE_RP7, + PCI_DID_INTEL_JSP_PCIE_RP1, + PCI_DID_INTEL_JSP_PCIE_RP2, + PCI_DID_INTEL_JSP_PCIE_RP3, + PCI_DID_INTEL_JSP_PCIE_RP4, + PCI_DID_INTEL_JSP_PCIE_RP5, + PCI_DID_INTEL_JSP_PCIE_RP6, + PCI_DID_INTEL_JSP_PCIE_RP7, + PCI_DID_INTEL_JSP_PCIE_RP8, + PCI_DID_INTEL_ADL_P_PCIE_RP1, + PCI_DID_INTEL_ADL_P_PCIE_RP2, + PCI_DID_INTEL_ADL_P_PCIE_RP3, + PCI_DID_INTEL_ADP_P_PCIE_RP1, + PCI_DID_INTEL_ADP_P_PCIE_RP2, + PCI_DID_INTEL_ADP_P_PCIE_RP3, + PCI_DID_INTEL_ADP_P_PCIE_RP4, + PCI_DID_INTEL_ADP_P_PCIE_RP5, + PCI_DID_INTEL_ADP_P_PCIE_RP6, + PCI_DID_INTEL_ADP_P_PCIE_RP7, + PCI_DID_INTEL_ADP_P_PCIE_RP8, + PCI_DID_INTEL_ADP_P_PCIE_RP9, + PCI_DID_INTEL_ADP_P_PCIE_RP10, + PCI_DID_INTEL_ADP_P_PCIE_RP11, + PCI_DID_INTEL_ADP_P_PCIE_RP12, + PCI_DID_INTEL_ADP_S_PCIE_RP1, + PCI_DID_INTEL_ADP_S_PCIE_RP2, + PCI_DID_INTEL_ADP_S_PCIE_RP3, + PCI_DID_INTEL_ADP_S_PCIE_RP4, + PCI_DID_INTEL_ADP_S_PCIE_RP5, + PCI_DID_INTEL_ADP_S_PCIE_RP6, + PCI_DID_INTEL_ADP_S_PCIE_RP7, + PCI_DID_INTEL_ADP_S_PCIE_RP8, + PCI_DID_INTEL_ADP_S_PCIE_RP9, + PCI_DID_INTEL_ADP_S_PCIE_RP10, + PCI_DID_INTEL_ADP_S_PCIE_RP11, + PCI_DID_INTEL_ADP_S_PCIE_RP12, + PCI_DID_INTEL_ADP_S_PCIE_RP13, + PCI_DID_INTEL_ADP_S_PCIE_RP14, + PCI_DID_INTEL_ADP_S_PCIE_RP15, + PCI_DID_INTEL_ADP_S_PCIE_RP16, + PCI_DID_INTEL_ADP_S_PCIE_RP17, + PCI_DID_INTEL_ADP_S_PCIE_RP18, + PCI_DID_INTEL_ADP_S_PCIE_RP19, + PCI_DID_INTEL_ADP_S_PCIE_RP20, + PCI_DID_INTEL_ADP_S_PCIE_RP21, + PCI_DID_INTEL_ADP_S_PCIE_RP22, + PCI_DID_INTEL_ADP_S_PCIE_RP23, + PCI_DID_INTEL_ADP_S_PCIE_RP24, + PCI_DID_INTEL_ADP_S_PCIE_RP25, + PCI_DID_INTEL_ADP_S_PCIE_RP26, + PCI_DID_INTEL_ADP_S_PCIE_RP27, + PCI_DID_INTEL_ADP_S_PCIE_RP28, + PCI_DID_INTEL_ADP_M_N_PCIE_RP1, + PCI_DID_INTEL_ADP_M_N_PCIE_RP2, + PCI_DID_INTEL_ADP_M_N_PCIE_RP3, + PCI_DID_INTEL_ADP_M_N_PCIE_RP4, + PCI_DID_INTEL_ADP_M_PCIE_RP5, + PCI_DID_INTEL_ADP_M_PCIE_RP6, + PCI_DID_INTEL_ADP_M_N_PCIE_RP7, + PCI_DID_INTEL_ADP_M_PCIE_RP8, + PCI_DID_INTEL_ADP_M_N_PCIE_RP9, + PCI_DID_INTEL_ADP_M_N_PCIE_RP10, + PCI_DID_INTEL_ADP_N_PCIE_RP11, + PCI_DID_INTEL_ADP_N_PCIE_RP12, 0 }; static const struct pci_driver pch_pcie __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pcie_device_ids, }; diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index b64841d616fd..105d92c5f4f4 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -111,30 +111,30 @@ static struct device_operations device_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_DNV_PMC, - PCI_DEVICE_ID_INTEL_SPT_LP_PMC, - PCI_DEVICE_ID_INTEL_SPT_H_PMC, - PCI_DEVICE_ID_INTEL_LWB_PMC, - PCI_DEVICE_ID_INTEL_LWB_PMC_SUPER, - PCI_DEVICE_ID_INTEL_UPT_H_PMC, - PCI_DEVICE_ID_INTEL_APL_PMC, - PCI_DEVICE_ID_INTEL_GLK_PMC, - PCI_DEVICE_ID_INTEL_CNP_H_PMC, - PCI_DEVICE_ID_INTEL_ICP_PMC, - PCI_DEVICE_ID_INTEL_CMP_PMC, - PCI_DEVICE_ID_INTEL_CMP_H_PMC, - PCI_DEVICE_ID_INTEL_TGP_PMC, - PCI_DEVICE_ID_INTEL_TGP_H_PMC, - PCI_DEVICE_ID_INTEL_MCC_PMC, - PCI_DEVICE_ID_INTEL_JSP_PMC, - PCI_DEVICE_ID_INTEL_ADP_P_PMC, - PCI_DEVICE_ID_INTEL_ADP_S_PMC, - PCI_DEVICE_ID_INTEL_ADP_M_N_PMC, + PCI_DID_INTEL_DNV_PMC, + PCI_DID_INTEL_SPT_LP_PMC, + PCI_DID_INTEL_SPT_H_PMC, + PCI_DID_INTEL_LWB_PMC, + PCI_DID_INTEL_LWB_PMC_SUPER, + PCI_DID_INTEL_UPT_H_PMC, + PCI_DID_INTEL_APL_PMC, + PCI_DID_INTEL_GLK_PMC, + PCI_DID_INTEL_CNP_H_PMC, + PCI_DID_INTEL_ICP_PMC, + PCI_DID_INTEL_CMP_PMC, + PCI_DID_INTEL_CMP_H_PMC, + PCI_DID_INTEL_TGP_PMC, + PCI_DID_INTEL_TGP_H_PMC, + PCI_DID_INTEL_MCC_PMC, + PCI_DID_INTEL_JSP_PMC, + PCI_DID_INTEL_ADP_P_PMC, + PCI_DID_INTEL_ADP_S_PMC, + PCI_DID_INTEL_ADP_M_N_PMC, 0 }; static const struct pci_driver pch_pmc __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c index 08c1bbb1fe1e..fa937f4fd555 100644 --- a/src/soc/intel/common/block/sata/sata.c +++ b/src/soc/intel/common/block/sata/sata.c @@ -13,62 +13,62 @@ static struct device_operations sata_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_U_SATA, - PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_SPT_KBL_SATA, - PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI, - PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI, - PCI_DEVICE_ID_INTEL_LWB_SATA_RAID, - PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID, - PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SATA_RAID_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SATA_ALT, - PCI_DEVICE_ID_INTEL_LWB_SATA_ALT_RST, - PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT, - PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT_RST, - PCI_DEVICE_ID_INTEL_CNL_SATA, - PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_CNP_CMP_COMPAT_SATA, - PCI_DEVICE_ID_INTEL_CNP_H_SATA, - PCI_DEVICE_ID_INTEL_CNP_H_HALO_SATA, - PCI_DEVICE_ID_INTEL_CNP_LP_SATA, - PCI_DEVICE_ID_INTEL_ICP_U_SATA, - PCI_DEVICE_ID_INTEL_CMP_SATA, - PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_CMP_LP_SATA, - PCI_DEVICE_ID_INTEL_CMP_H_SATA, - PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA, - PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_TGP_LP_SATA, - PCI_DEVICE_ID_INTEL_TGP_SATA, - PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA, - PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA, - PCI_DEVICE_ID_INTEL_TGP_H_SATA, - PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA, - PCI_DEVICE_ID_INTEL_JSP_SATA_1, - PCI_DEVICE_ID_INTEL_JSP_SATA_2, - PCI_DEVICE_ID_INTEL_ADP_P_SATA_1, - PCI_DEVICE_ID_INTEL_ADP_P_SATA_2, - PCI_DEVICE_ID_INTEL_ADP_P_SATA_3, - PCI_DEVICE_ID_INTEL_ADP_P_SATA_4, - PCI_DEVICE_ID_INTEL_ADP_P_SATA_5, - PCI_DEVICE_ID_INTEL_ADP_P_SATA_6, - PCI_DEVICE_ID_INTEL_ADP_S_SATA_1, - PCI_DEVICE_ID_INTEL_ADP_S_SATA_2, - PCI_DEVICE_ID_INTEL_ADP_S_SATA_3, - PCI_DEVICE_ID_INTEL_ADP_S_SATA_4, - PCI_DEVICE_ID_INTEL_ADP_S_SATA_5, - PCI_DEVICE_ID_INTEL_ADP_S_SATA_6, - PCI_DEVICE_ID_INTEL_ADP_M_SATA_1, - PCI_DEVICE_ID_INTEL_ADP_M_SATA_2, - PCI_DEVICE_ID_INTEL_ADP_M_SATA_3, + PCI_DID_INTEL_SPT_U_SATA, + PCI_DID_INTEL_SPT_U_Y_PREMIUM_SATA, + PCI_DID_INTEL_SPT_KBL_SATA, + PCI_DID_INTEL_LWB_SATA_AHCI, + PCI_DID_INTEL_LWB_SSATA_AHCI, + PCI_DID_INTEL_LWB_SATA_RAID, + PCI_DID_INTEL_LWB_SSATA_RAID, + PCI_DID_INTEL_LWB_SATA_AHCI_SUPER, + PCI_DID_INTEL_LWB_SSATA_AHCI_SUPER, + PCI_DID_INTEL_LWB_SATA_RAID_SUPER, + PCI_DID_INTEL_LWB_SSATA_RAID_SUPER, + PCI_DID_INTEL_LWB_SATA_ALT, + PCI_DID_INTEL_LWB_SATA_ALT_RST, + PCI_DID_INTEL_LWB_SSATA_ALT, + PCI_DID_INTEL_LWB_SSATA_ALT_RST, + PCI_DID_INTEL_CNL_SATA, + PCI_DID_INTEL_CNL_PREMIUM_SATA, + PCI_DID_INTEL_CNP_CMP_COMPAT_SATA, + PCI_DID_INTEL_CNP_H_SATA, + PCI_DID_INTEL_CNP_H_HALO_SATA, + PCI_DID_INTEL_CNP_LP_SATA, + PCI_DID_INTEL_ICP_U_SATA, + PCI_DID_INTEL_CMP_SATA, + PCI_DID_INTEL_CMP_PREMIUM_SATA, + PCI_DID_INTEL_CMP_LP_SATA, + PCI_DID_INTEL_CMP_H_SATA, + PCI_DID_INTEL_CMP_H_HALO_SATA, + PCI_DID_INTEL_CMP_H_PREMIUM_SATA, + PCI_DID_INTEL_TGP_LP_SATA, + PCI_DID_INTEL_TGP_SATA, + PCI_DID_INTEL_TGP_PREMIUM_SATA, + PCI_DID_INTEL_TGP_COMPAT_SATA, + PCI_DID_INTEL_TGP_H_SATA, + PCI_DID_INTEL_MCC_AHCI_SATA, + PCI_DID_INTEL_JSP_SATA_1, + PCI_DID_INTEL_JSP_SATA_2, + PCI_DID_INTEL_ADP_P_SATA_1, + PCI_DID_INTEL_ADP_P_SATA_2, + PCI_DID_INTEL_ADP_P_SATA_3, + PCI_DID_INTEL_ADP_P_SATA_4, + PCI_DID_INTEL_ADP_P_SATA_5, + PCI_DID_INTEL_ADP_P_SATA_6, + PCI_DID_INTEL_ADP_S_SATA_1, + PCI_DID_INTEL_ADP_S_SATA_2, + PCI_DID_INTEL_ADP_S_SATA_3, + PCI_DID_INTEL_ADP_S_SATA_4, + PCI_DID_INTEL_ADP_S_SATA_5, + PCI_DID_INTEL_ADP_S_SATA_6, + PCI_DID_INTEL_ADP_M_SATA_1, + PCI_DID_INTEL_ADP_M_SATA_2, + PCI_DID_INTEL_ADP_M_SATA_3, 0 }; static const struct pci_driver pch_sata __pci_driver = { .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/scs/mmc.c b/src/soc/intel/common/block/scs/mmc.c index 7f5519aa1af2..538f77f09964 100644 --- a/src/soc/intel/common/block/scs/mmc.c +++ b/src/soc/intel/common/block/scs/mmc.c @@ -71,14 +71,14 @@ static struct device_operations dev_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_CMP_EMMC, - PCI_DEVICE_ID_INTEL_JSP_EMMC, - PCI_DEVICE_ID_INTEL_ADP_EMMC, + PCI_DID_INTEL_CMP_EMMC, + PCI_DID_INTEL_JSP_EMMC, + PCI_DID_INTEL_ADP_EMMC, 0 }; static const struct pci_driver pch_sd __pci_driver = { .ops = &dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c index be59a3db7279..11a4a9441786 100644 --- a/src/soc/intel/common/block/scs/sd.c +++ b/src/soc/intel/common/block/scs/sd.c @@ -49,21 +49,21 @@ static struct device_operations dev_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_SD, - PCI_DEVICE_ID_INTEL_CNL_SD, - PCI_DEVICE_ID_INTEL_GLK_SD, - PCI_DEVICE_ID_INTEL_SKL_SD, - PCI_DEVICE_ID_INTEL_CNP_H_SD, - PCI_DEVICE_ID_INTEL_ICL_SD, - PCI_DEVICE_ID_INTEL_CMP_SD, - PCI_DEVICE_ID_INTEL_CMP_H_SD, - PCI_DEVICE_ID_INTEL_MCC_SD, - PCI_DEVICE_ID_INTEL_JSP_SD, + PCI_DID_INTEL_APL_SD, + PCI_DID_INTEL_CNL_SD, + PCI_DID_INTEL_GLK_SD, + PCI_DID_INTEL_SKL_SD, + PCI_DID_INTEL_CNP_H_SD, + PCI_DID_INTEL_ICL_SD, + PCI_DID_INTEL_CMP_SD, + PCI_DID_INTEL_CMP_H_SD, + PCI_DID_INTEL_MCC_SD, + PCI_DID_INTEL_JSP_SD, 0 }; static const struct pci_driver pch_sd __pci_driver = { .ops = &dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids }; diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 94a54b7b7f3c..2b135c75e839 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -74,29 +74,29 @@ static struct device_operations smbus_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_SMBUS, - PCI_DEVICE_ID_INTEL_CNL_SMBUS, - PCI_DEVICE_ID_INTEL_CNP_H_SMBUS, - PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS, - PCI_DEVICE_ID_INTEL_SPT_H_SMBUS, - PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER, - PCI_DEVICE_ID_INTEL_LWB_SMBUS, - PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS, - PCI_DEVICE_ID_INTEL_CMP_SMBUS, - PCI_DEVICE_ID_INTEL_CMP_H_SMBUS, - PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS, - PCI_DEVICE_ID_INTEL_TGP_H_SMBUS, - PCI_DEVICE_ID_INTEL_MCC_SMBUS, - PCI_DEVICE_ID_INTEL_JSP_SMBUS, - PCI_DEVICE_ID_INTEL_ADP_P_SMBUS, - PCI_DEVICE_ID_INTEL_ADP_S_SMBUS, - PCI_DEVICE_ID_INTEL_ADP_M_N_SMBUS, - PCI_DEVICE_ID_INTEL_DNV_SMBUS_LEGACY, + PCI_DID_INTEL_APL_SMBUS, + PCI_DID_INTEL_CNL_SMBUS, + PCI_DID_INTEL_CNP_H_SMBUS, + PCI_DID_INTEL_SPT_LP_SMBUS, + PCI_DID_INTEL_SPT_H_SMBUS, + PCI_DID_INTEL_LWB_SMBUS_SUPER, + PCI_DID_INTEL_LWB_SMBUS, + PCI_DID_INTEL_ICP_LP_SMBUS, + PCI_DID_INTEL_CMP_SMBUS, + PCI_DID_INTEL_CMP_H_SMBUS, + PCI_DID_INTEL_TGP_LP_SMBUS, + PCI_DID_INTEL_TGP_H_SMBUS, + PCI_DID_INTEL_MCC_SMBUS, + PCI_DID_INTEL_JSP_SMBUS, + PCI_DID_INTEL_ADP_P_SMBUS, + PCI_DID_INTEL_ADP_S_SMBUS, + PCI_DID_INTEL_ADP_M_N_SMBUS, + PCI_DID_INTEL_DNV_SMBUS_LEGACY, 0 }; static const struct pci_driver pch_smbus __pci_driver = { .ops = &smbus_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c index 33d62c1975af..914809951ca4 100644 --- a/src/soc/intel/common/block/spi/spi.c +++ b/src/soc/intel/common/block/spi/spi.c @@ -39,85 +39,85 @@ static struct device_operations spi_dev_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_SPI1, - PCI_DEVICE_ID_INTEL_SPT_SPI2, - PCI_DEVICE_ID_INTEL_SPT_SPI3, - PCI_DEVICE_ID_INTEL_APL_SPI0, - PCI_DEVICE_ID_INTEL_APL_SPI1, - PCI_DEVICE_ID_INTEL_APL_SPI2, - PCI_DEVICE_ID_INTEL_APL_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_GLK_SPI0, - PCI_DEVICE_ID_INTEL_GLK_SPI1, - PCI_DEVICE_ID_INTEL_GLK_SPI2, - PCI_DEVICE_ID_INTEL_CNL_SPI0, - PCI_DEVICE_ID_INTEL_CNL_SPI1, - PCI_DEVICE_ID_INTEL_CNL_SPI2, - PCI_DEVICE_ID_INTEL_CNL_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_CNP_H_SPI0, - PCI_DEVICE_ID_INTEL_CNP_H_SPI1, - PCI_DEVICE_ID_INTEL_CNP_H_SPI2, - PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_LWB_SPI, - PCI_DEVICE_ID_INTEL_LWB_SPI_SUPER, - PCI_DEVICE_ID_INTEL_ICP_SPI0, - PCI_DEVICE_ID_INTEL_ICP_SPI1, - PCI_DEVICE_ID_INTEL_ICP_SPI2, - PCI_DEVICE_ID_INTEL_ICP_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_CMP_SPI0, - PCI_DEVICE_ID_INTEL_CMP_SPI1, - PCI_DEVICE_ID_INTEL_CMP_SPI2, - PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_CMP_H_SPI0, - PCI_DEVICE_ID_INTEL_CMP_H_SPI1, - PCI_DEVICE_ID_INTEL_CMP_H_SPI2, - PCI_DEVICE_ID_INTEL_CMP_H_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_TGP_SPI0, - PCI_DEVICE_ID_INTEL_TGP_GSPI0, - PCI_DEVICE_ID_INTEL_TGP_GSPI1, - PCI_DEVICE_ID_INTEL_TGP_GSPI2, - PCI_DEVICE_ID_INTEL_TGP_GSPI3, - PCI_DEVICE_ID_INTEL_TGP_GSPI4, - PCI_DEVICE_ID_INTEL_TGP_GSPI5, - PCI_DEVICE_ID_INTEL_TGP_GSPI6, - PCI_DEVICE_ID_INTEL_TGP_H_SPI0, - PCI_DEVICE_ID_INTEL_TGP_H_GSPI0, - PCI_DEVICE_ID_INTEL_TGP_H_GSPI1, - PCI_DEVICE_ID_INTEL_TGP_H_GSPI2, - PCI_DEVICE_ID_INTEL_TGP_H_GSPI3, - PCI_DEVICE_ID_INTEL_MCC_SPI0, - PCI_DEVICE_ID_INTEL_MCC_GSPI0, - PCI_DEVICE_ID_INTEL_MCC_GSPI1, - PCI_DEVICE_ID_INTEL_MCC_GSPI2, - PCI_DEVICE_ID_INTEL_JSP_SPI0, - PCI_DEVICE_ID_INTEL_JSP_SPI1, - PCI_DEVICE_ID_INTEL_JSP_SPI2, - PCI_DEVICE_ID_INTEL_JSP_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_ADP_P_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_ADP_S_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_ADP_M_N_HWSEQ_SPI, - PCI_DEVICE_ID_INTEL_ADP_P_SPI0, - PCI_DEVICE_ID_INTEL_ADP_P_SPI1, - PCI_DEVICE_ID_INTEL_ADP_P_SPI2, - PCI_DEVICE_ID_INTEL_ADP_P_SPI3, - PCI_DEVICE_ID_INTEL_ADP_P_SPI4, - PCI_DEVICE_ID_INTEL_ADP_P_SPI5, - PCI_DEVICE_ID_INTEL_ADP_P_SPI6, - PCI_DEVICE_ID_INTEL_ADP_S_SPI0, - PCI_DEVICE_ID_INTEL_ADP_S_SPI1, - PCI_DEVICE_ID_INTEL_ADP_S_SPI2, - PCI_DEVICE_ID_INTEL_ADP_S_SPI3, - PCI_DEVICE_ID_INTEL_ADP_S_SPI4, - PCI_DEVICE_ID_INTEL_ADP_S_SPI5, - PCI_DEVICE_ID_INTEL_ADP_S_SPI6, - PCI_DEVICE_ID_INTEL_ADP_M_N_SPI0, - PCI_DEVICE_ID_INTEL_ADP_M_N_SPI1, - PCI_DEVICE_ID_INTEL_ADP_M_SPI2, - PCI_DEVICE_ID_INTEL_SPR_HWSEQ_SPI, + PCI_DID_INTEL_SPT_SPI1, + PCI_DID_INTEL_SPT_SPI2, + PCI_DID_INTEL_SPT_SPI3, + PCI_DID_INTEL_APL_SPI0, + PCI_DID_INTEL_APL_SPI1, + PCI_DID_INTEL_APL_SPI2, + PCI_DID_INTEL_APL_HWSEQ_SPI, + PCI_DID_INTEL_GLK_SPI0, + PCI_DID_INTEL_GLK_SPI1, + PCI_DID_INTEL_GLK_SPI2, + PCI_DID_INTEL_CNL_SPI0, + PCI_DID_INTEL_CNL_SPI1, + PCI_DID_INTEL_CNL_SPI2, + PCI_DID_INTEL_CNL_HWSEQ_SPI, + PCI_DID_INTEL_CNP_H_SPI0, + PCI_DID_INTEL_CNP_H_SPI1, + PCI_DID_INTEL_CNP_H_SPI2, + PCI_DID_INTEL_CNP_H_HWSEQ_SPI, + PCI_DID_INTEL_LWB_SPI, + PCI_DID_INTEL_LWB_SPI_SUPER, + PCI_DID_INTEL_ICP_SPI0, + PCI_DID_INTEL_ICP_SPI1, + PCI_DID_INTEL_ICP_SPI2, + PCI_DID_INTEL_ICP_HWSEQ_SPI, + PCI_DID_INTEL_CMP_SPI0, + PCI_DID_INTEL_CMP_SPI1, + PCI_DID_INTEL_CMP_SPI2, + PCI_DID_INTEL_CMP_HWSEQ_SPI, + PCI_DID_INTEL_CMP_H_SPI0, + PCI_DID_INTEL_CMP_H_SPI1, + PCI_DID_INTEL_CMP_H_SPI2, + PCI_DID_INTEL_CMP_H_HWSEQ_SPI, + PCI_DID_INTEL_TGP_SPI0, + PCI_DID_INTEL_TGP_GSPI0, + PCI_DID_INTEL_TGP_GSPI1, + PCI_DID_INTEL_TGP_GSPI2, + PCI_DID_INTEL_TGP_GSPI3, + PCI_DID_INTEL_TGP_GSPI4, + PCI_DID_INTEL_TGP_GSPI5, + PCI_DID_INTEL_TGP_GSPI6, + PCI_DID_INTEL_TGP_H_SPI0, + PCI_DID_INTEL_TGP_H_GSPI0, + PCI_DID_INTEL_TGP_H_GSPI1, + PCI_DID_INTEL_TGP_H_GSPI2, + PCI_DID_INTEL_TGP_H_GSPI3, + PCI_DID_INTEL_MCC_SPI0, + PCI_DID_INTEL_MCC_GSPI0, + PCI_DID_INTEL_MCC_GSPI1, + PCI_DID_INTEL_MCC_GSPI2, + PCI_DID_INTEL_JSP_SPI0, + PCI_DID_INTEL_JSP_SPI1, + PCI_DID_INTEL_JSP_SPI2, + PCI_DID_INTEL_JSP_HWSEQ_SPI, + PCI_DID_INTEL_ADP_P_HWSEQ_SPI, + PCI_DID_INTEL_ADP_S_HWSEQ_SPI, + PCI_DID_INTEL_ADP_M_N_HWSEQ_SPI, + PCI_DID_INTEL_ADP_P_SPI0, + PCI_DID_INTEL_ADP_P_SPI1, + PCI_DID_INTEL_ADP_P_SPI2, + PCI_DID_INTEL_ADP_P_SPI3, + PCI_DID_INTEL_ADP_P_SPI4, + PCI_DID_INTEL_ADP_P_SPI5, + PCI_DID_INTEL_ADP_P_SPI6, + PCI_DID_INTEL_ADP_S_SPI0, + PCI_DID_INTEL_ADP_S_SPI1, + PCI_DID_INTEL_ADP_S_SPI2, + PCI_DID_INTEL_ADP_S_SPI3, + PCI_DID_INTEL_ADP_S_SPI4, + PCI_DID_INTEL_ADP_S_SPI5, + PCI_DID_INTEL_ADP_S_SPI6, + PCI_DID_INTEL_ADP_M_N_SPI0, + PCI_DID_INTEL_ADP_M_N_SPI1, + PCI_DID_INTEL_ADP_M_SPI2, + PCI_DID_INTEL_SPR_HWSEQ_SPI, 0 }; static const struct pci_driver pch_spi __pci_driver = { .ops = &spi_dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c index 1badb83dafaa..60e06dc36887 100644 --- a/src/soc/intel/common/block/sram/sram.c +++ b/src/soc/intel/common/block/sram/sram.c @@ -33,23 +33,23 @@ static const struct device_operations device_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_SRAM, - PCI_DEVICE_ID_INTEL_GLK_SRAM, - PCI_DEVICE_ID_INTEL_ICL_SRAM, - PCI_DEVICE_ID_INTEL_CMP_SRAM, - PCI_DEVICE_ID_INTEL_CMP_H_SRAM, - PCI_DEVICE_ID_INTEL_TGP_PMC_CRASHLOG_SRAM, - PCI_DEVICE_ID_INTEL_TGL_H_SRAM, - PCI_DEVICE_ID_INTEL_MCC_SRAM, - PCI_DEVICE_ID_INTEL_JSP_SRAM, - PCI_DEVICE_ID_INTEL_ADP_S_PMC_CRASHLOG_SRAM, - PCI_DEVICE_ID_INTEL_ADP_P_PMC_CRASHLOG_SRAM, - PCI_DEVICE_ID_INTEL_ADP_N_PMC_CRASHLOG_SRAM, + PCI_DID_INTEL_APL_SRAM, + PCI_DID_INTEL_GLK_SRAM, + PCI_DID_INTEL_ICL_SRAM, + PCI_DID_INTEL_CMP_SRAM, + PCI_DID_INTEL_CMP_H_SRAM, + PCI_DID_INTEL_TGP_PMC_CRASHLOG_SRAM, + PCI_DID_INTEL_TGL_H_SRAM, + PCI_DID_INTEL_MCC_SRAM, + PCI_DID_INTEL_JSP_SRAM, + PCI_DID_INTEL_ADP_S_PMC_CRASHLOG_SRAM, + PCI_DID_INTEL_ADP_P_PMC_CRASHLOG_SRAM, + PCI_DID_INTEL_ADP_N_PMC_CRASHLOG_SRAM, 0, }; static const struct pci_driver sram __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index f50690ea7977..3c068577d017 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -327,124 +327,124 @@ static struct device_operations systemagent_ops = { }; static const unsigned short systemagent_ids[] = { - PCI_DEVICE_ID_INTEL_GLK_NB, - PCI_DEVICE_ID_INTEL_APL_NB, - PCI_DEVICE_ID_INTEL_CNL_ID_U, - PCI_DEVICE_ID_INTEL_CNL_ID_Y, - PCI_DEVICE_ID_INTEL_SKL_ID_U, - PCI_DEVICE_ID_INTEL_SKL_ID_Y, - PCI_DEVICE_ID_INTEL_SKL_ID_ULX, - PCI_DEVICE_ID_INTEL_SKL_ID_H_4, - PCI_DEVICE_ID_INTEL_SKL_ID_H_2, - PCI_DEVICE_ID_INTEL_SKL_ID_S_2, - PCI_DEVICE_ID_INTEL_SKL_ID_S_4, - PCI_DEVICE_ID_INTEL_WHL_ID_W_2, - PCI_DEVICE_ID_INTEL_WHL_ID_W_4, - PCI_DEVICE_ID_INTEL_KBL_ID_S, - PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, - PCI_DEVICE_ID_INTEL_KBL_ID_U, - PCI_DEVICE_ID_INTEL_KBL_ID_Y, - PCI_DEVICE_ID_INTEL_KBL_ID_H, - PCI_DEVICE_ID_INTEL_KBL_U_R, - PCI_DEVICE_ID_INTEL_KBL_ID_DT, - PCI_DEVICE_ID_INTEL_KBL_ID_DT_2, - PCI_DEVICE_ID_INTEL_CFL_ID_U, - PCI_DEVICE_ID_INTEL_CFL_ID_U_2, - PCI_DEVICE_ID_INTEL_CFL_ID_H, - PCI_DEVICE_ID_INTEL_CFL_ID_H_4, - PCI_DEVICE_ID_INTEL_CFL_ID_H_8, - PCI_DEVICE_ID_INTEL_CFL_ID_S, - PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2, - PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4, - PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8, - PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4, - PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6, - PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8, - PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4, - PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6, - PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8, - PCI_DEVICE_ID_INTEL_ICL_ID_U, - PCI_DEVICE_ID_INTEL_ICL_ID_U_2_2, - PCI_DEVICE_ID_INTEL_ICL_ID_Y, - PCI_DEVICE_ID_INTEL_ICL_ID_Y_2, - PCI_DEVICE_ID_INTEL_CML_ULT, - PCI_DEVICE_ID_INTEL_CML_ULT_2_2, - PCI_DEVICE_ID_INTEL_CML_ULT_6_2, - PCI_DEVICE_ID_INTEL_CML_ULX, - PCI_DEVICE_ID_INTEL_CML_S, - PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2, - PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, - PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, - PCI_DEVICE_ID_INTEL_CML_S_G0G1_4, - PCI_DEVICE_ID_INTEL_CML_S_G0G1_2, - PCI_DEVICE_ID_INTEL_CML_H, - PCI_DEVICE_ID_INTEL_CML_H_4_2, - PCI_DEVICE_ID_INTEL_CML_H_8_2, - PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, - PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, - PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, - PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, - PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1, - PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1, - PCI_DEVICE_ID_INTEL_EHL_ID_0, - PCI_DEVICE_ID_INTEL_EHL_ID_1, - PCI_DEVICE_ID_INTEL_EHL_ID_1A, - PCI_DEVICE_ID_INTEL_EHL_ID_2, - PCI_DEVICE_ID_INTEL_EHL_ID_2_1, - PCI_DEVICE_ID_INTEL_EHL_ID_3, - PCI_DEVICE_ID_INTEL_EHL_ID_3A, - PCI_DEVICE_ID_INTEL_EHL_ID_4, - PCI_DEVICE_ID_INTEL_EHL_ID_5, - PCI_DEVICE_ID_INTEL_EHL_ID_6, - PCI_DEVICE_ID_INTEL_EHL_ID_7, - PCI_DEVICE_ID_INTEL_EHL_ID_8, - PCI_DEVICE_ID_INTEL_EHL_ID_9, - PCI_DEVICE_ID_INTEL_EHL_ID_10, - PCI_DEVICE_ID_INTEL_EHL_ID_11, - PCI_DEVICE_ID_INTEL_EHL_ID_12, - PCI_DEVICE_ID_INTEL_EHL_ID_13, - PCI_DEVICE_ID_INTEL_EHL_ID_14, - PCI_DEVICE_ID_INTEL_EHL_ID_15, - PCI_DEVICE_ID_INTEL_JSL_ID_1, - PCI_DEVICE_ID_INTEL_JSL_ID_2, - PCI_DEVICE_ID_INTEL_JSL_ID_3, - PCI_DEVICE_ID_INTEL_JSL_ID_4, - PCI_DEVICE_ID_INTEL_JSL_ID_5, - PCI_DEVICE_ID_INTEL_ADL_S_ID_1, - PCI_DEVICE_ID_INTEL_ADL_S_ID_2, - PCI_DEVICE_ID_INTEL_ADL_S_ID_3, - PCI_DEVICE_ID_INTEL_ADL_S_ID_4, - PCI_DEVICE_ID_INTEL_ADL_S_ID_5, - PCI_DEVICE_ID_INTEL_ADL_S_ID_6, - PCI_DEVICE_ID_INTEL_ADL_S_ID_7, - PCI_DEVICE_ID_INTEL_ADL_S_ID_8, - PCI_DEVICE_ID_INTEL_ADL_S_ID_9, - PCI_DEVICE_ID_INTEL_ADL_S_ID_10, - PCI_DEVICE_ID_INTEL_ADL_S_ID_11, - PCI_DEVICE_ID_INTEL_ADL_S_ID_12, - PCI_DEVICE_ID_INTEL_ADL_S_ID_13, - PCI_DEVICE_ID_INTEL_ADL_S_ID_14, - PCI_DEVICE_ID_INTEL_ADL_S_ID_15, - PCI_DEVICE_ID_INTEL_ADL_P_ID_1, - PCI_DEVICE_ID_INTEL_ADL_P_ID_3, - PCI_DEVICE_ID_INTEL_ADL_P_ID_4, - PCI_DEVICE_ID_INTEL_ADL_P_ID_5, - PCI_DEVICE_ID_INTEL_ADL_P_ID_6, - PCI_DEVICE_ID_INTEL_ADL_P_ID_7, - PCI_DEVICE_ID_INTEL_ADL_P_ID_8, - PCI_DEVICE_ID_INTEL_ADL_P_ID_9, - PCI_DEVICE_ID_INTEL_ADL_P_ID_10, - PCI_DEVICE_ID_INTEL_ADL_M_ID_1, - PCI_DEVICE_ID_INTEL_ADL_M_ID_2, - PCI_DEVICE_ID_INTEL_ADL_N_ID_1, - PCI_DEVICE_ID_INTEL_ADL_N_ID_2, - PCI_DEVICE_ID_INTEL_ADL_N_ID_3, - PCI_DEVICE_ID_INTEL_ADL_N_ID_4, + PCI_DID_INTEL_GLK_NB, + PCI_DID_INTEL_APL_NB, + PCI_DID_INTEL_CNL_ID_U, + PCI_DID_INTEL_CNL_ID_Y, + PCI_DID_INTEL_SKL_ID_U, + PCI_DID_INTEL_SKL_ID_Y, + PCI_DID_INTEL_SKL_ID_ULX, + PCI_DID_INTEL_SKL_ID_H_4, + PCI_DID_INTEL_SKL_ID_H_2, + PCI_DID_INTEL_SKL_ID_S_2, + PCI_DID_INTEL_SKL_ID_S_4, + PCI_DID_INTEL_WHL_ID_W_2, + PCI_DID_INTEL_WHL_ID_W_4, + PCI_DID_INTEL_KBL_ID_S, + PCI_DID_INTEL_SKL_ID_H_EM, + PCI_DID_INTEL_KBL_ID_U, + PCI_DID_INTEL_KBL_ID_Y, + PCI_DID_INTEL_KBL_ID_H, + PCI_DID_INTEL_KBL_U_R, + PCI_DID_INTEL_KBL_ID_DT, + PCI_DID_INTEL_KBL_ID_DT_2, + PCI_DID_INTEL_CFL_ID_U, + PCI_DID_INTEL_CFL_ID_U_2, + PCI_DID_INTEL_CFL_ID_H, + PCI_DID_INTEL_CFL_ID_H_4, + PCI_DID_INTEL_CFL_ID_H_8, + PCI_DID_INTEL_CFL_ID_S, + PCI_DID_INTEL_CFL_ID_S_DT_2, + PCI_DID_INTEL_CFL_ID_S_DT_4, + PCI_DID_INTEL_CFL_ID_S_DT_8, + PCI_DID_INTEL_CFL_ID_S_WS_4, + PCI_DID_INTEL_CFL_ID_S_WS_6, + PCI_DID_INTEL_CFL_ID_S_WS_8, + PCI_DID_INTEL_CFL_ID_S_S_4, + PCI_DID_INTEL_CFL_ID_S_S_6, + PCI_DID_INTEL_CFL_ID_S_S_8, + PCI_DID_INTEL_ICL_ID_U, + PCI_DID_INTEL_ICL_ID_U_2_2, + PCI_DID_INTEL_ICL_ID_Y, + PCI_DID_INTEL_ICL_ID_Y_2, + PCI_DID_INTEL_CML_ULT, + PCI_DID_INTEL_CML_ULT_2_2, + PCI_DID_INTEL_CML_ULT_6_2, + PCI_DID_INTEL_CML_ULX, + PCI_DID_INTEL_CML_S, + PCI_DID_INTEL_CML_S_G0G1_P0P1_6_2, + PCI_DID_INTEL_CML_S_P0P1_8_2, + PCI_DID_INTEL_CML_S_P0P1_10_2, + PCI_DID_INTEL_CML_S_G0G1_4, + PCI_DID_INTEL_CML_S_G0G1_2, + PCI_DID_INTEL_CML_H, + PCI_DID_INTEL_CML_H_4_2, + PCI_DID_INTEL_CML_H_8_2, + PCI_DID_INTEL_TGL_ID_U_2_2, + PCI_DID_INTEL_TGL_ID_U_4_2, + PCI_DID_INTEL_TGL_ID_Y_2_2, + PCI_DID_INTEL_TGL_ID_Y_4_2, + PCI_DID_INTEL_TGL_ID_H_6_1, + PCI_DID_INTEL_TGL_ID_H_8_1, + PCI_DID_INTEL_EHL_ID_0, + PCI_DID_INTEL_EHL_ID_1, + PCI_DID_INTEL_EHL_ID_1A, + PCI_DID_INTEL_EHL_ID_2, + PCI_DID_INTEL_EHL_ID_2_1, + PCI_DID_INTEL_EHL_ID_3, + PCI_DID_INTEL_EHL_ID_3A, + PCI_DID_INTEL_EHL_ID_4, + PCI_DID_INTEL_EHL_ID_5, + PCI_DID_INTEL_EHL_ID_6, + PCI_DID_INTEL_EHL_ID_7, + PCI_DID_INTEL_EHL_ID_8, + PCI_DID_INTEL_EHL_ID_9, + PCI_DID_INTEL_EHL_ID_10, + PCI_DID_INTEL_EHL_ID_11, + PCI_DID_INTEL_EHL_ID_12, + PCI_DID_INTEL_EHL_ID_13, + PCI_DID_INTEL_EHL_ID_14, + PCI_DID_INTEL_EHL_ID_15, + PCI_DID_INTEL_JSL_ID_1, + PCI_DID_INTEL_JSL_ID_2, + PCI_DID_INTEL_JSL_ID_3, + PCI_DID_INTEL_JSL_ID_4, + PCI_DID_INTEL_JSL_ID_5, + PCI_DID_INTEL_ADL_S_ID_1, + PCI_DID_INTEL_ADL_S_ID_2, + PCI_DID_INTEL_ADL_S_ID_3, + PCI_DID_INTEL_ADL_S_ID_4, + PCI_DID_INTEL_ADL_S_ID_5, + PCI_DID_INTEL_ADL_S_ID_6, + PCI_DID_INTEL_ADL_S_ID_7, + PCI_DID_INTEL_ADL_S_ID_8, + PCI_DID_INTEL_ADL_S_ID_9, + PCI_DID_INTEL_ADL_S_ID_10, + PCI_DID_INTEL_ADL_S_ID_11, + PCI_DID_INTEL_ADL_S_ID_12, + PCI_DID_INTEL_ADL_S_ID_13, + PCI_DID_INTEL_ADL_S_ID_14, + PCI_DID_INTEL_ADL_S_ID_15, + PCI_DID_INTEL_ADL_P_ID_1, + PCI_DID_INTEL_ADL_P_ID_3, + PCI_DID_INTEL_ADL_P_ID_4, + PCI_DID_INTEL_ADL_P_ID_5, + PCI_DID_INTEL_ADL_P_ID_6, + PCI_DID_INTEL_ADL_P_ID_7, + PCI_DID_INTEL_ADL_P_ID_8, + PCI_DID_INTEL_ADL_P_ID_9, + PCI_DID_INTEL_ADL_P_ID_10, + PCI_DID_INTEL_ADL_M_ID_1, + PCI_DID_INTEL_ADL_M_ID_2, + PCI_DID_INTEL_ADL_N_ID_1, + PCI_DID_INTEL_ADL_N_ID_2, + PCI_DID_INTEL_ADL_N_ID_3, + PCI_DID_INTEL_ADL_N_ID_4, 0 }; static const struct pci_driver systemagent_driver __pci_driver = { .ops = &systemagent_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = systemagent_ids }; diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 2e70d05ba30c..cd960f2ea91f 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -271,34 +271,34 @@ static void uart_fill_ssdt(const struct device *dev) static const char *uart_acpi_hid(const struct device *dev) { switch (dev->device) { - case PCI_DEVICE_ID_INTEL_APL_UART0: + case PCI_DID_INTEL_APL_UART0: return "80865abc"; - case PCI_DEVICE_ID_INTEL_APL_UART1: + case PCI_DID_INTEL_APL_UART1: return "80865abe"; - case PCI_DEVICE_ID_INTEL_APL_UART2: + case PCI_DID_INTEL_APL_UART2: return "80865ac0"; - case PCI_DEVICE_ID_INTEL_GLK_UART0: + case PCI_DID_INTEL_GLK_UART0: return "808631bc"; - case PCI_DEVICE_ID_INTEL_GLK_UART1: + case PCI_DID_INTEL_GLK_UART1: return "808631be"; - case PCI_DEVICE_ID_INTEL_GLK_UART2: + case PCI_DID_INTEL_GLK_UART2: return "808631c0"; - case PCI_DEVICE_ID_INTEL_GLK_UART3: + case PCI_DID_INTEL_GLK_UART3: return "808631ee"; - case PCI_DEVICE_ID_INTEL_SPT_UART0: - case PCI_DEVICE_ID_INTEL_SPT_H_UART0: + case PCI_DID_INTEL_SPT_UART0: + case PCI_DID_INTEL_SPT_H_UART0: return "INT3448"; - case PCI_DEVICE_ID_INTEL_SPT_UART1: - case PCI_DEVICE_ID_INTEL_SPT_H_UART1: + case PCI_DID_INTEL_SPT_UART1: + case PCI_DID_INTEL_SPT_H_UART1: return "INT3449"; - case PCI_DEVICE_ID_INTEL_SPT_UART2: - case PCI_DEVICE_ID_INTEL_SPT_H_UART2: + case PCI_DID_INTEL_SPT_UART2: + case PCI_DID_INTEL_SPT_H_UART2: return "INT344A"; - case PCI_DEVICE_ID_INTEL_CNP_H_UART0: + case PCI_DID_INTEL_CNP_H_UART0: return "INT34B8"; - case PCI_DEVICE_ID_INTEL_CNP_H_UART1: + case PCI_DID_INTEL_CNP_H_UART1: return "INT34B9"; - case PCI_DEVICE_ID_INTEL_CNP_H_UART2: + case PCI_DID_INTEL_CNP_H_UART2: return "INT34BA"; default: return NULL; @@ -308,25 +308,25 @@ static const char *uart_acpi_hid(const struct device *dev) static const char *uart_acpi_name(const struct device *dev) { switch (dev->device) { - case PCI_DEVICE_ID_INTEL_APL_UART0: - case PCI_DEVICE_ID_INTEL_GLK_UART0: - case PCI_DEVICE_ID_INTEL_SPT_UART0: - case PCI_DEVICE_ID_INTEL_SPT_H_UART0: - case PCI_DEVICE_ID_INTEL_CNP_H_UART0: + case PCI_DID_INTEL_APL_UART0: + case PCI_DID_INTEL_GLK_UART0: + case PCI_DID_INTEL_SPT_UART0: + case PCI_DID_INTEL_SPT_H_UART0: + case PCI_DID_INTEL_CNP_H_UART0: return "UAR0"; - case PCI_DEVICE_ID_INTEL_APL_UART1: - case PCI_DEVICE_ID_INTEL_GLK_UART1: - case PCI_DEVICE_ID_INTEL_SPT_UART1: - case PCI_DEVICE_ID_INTEL_SPT_H_UART1: - case PCI_DEVICE_ID_INTEL_CNP_H_UART1: + case PCI_DID_INTEL_APL_UART1: + case PCI_DID_INTEL_GLK_UART1: + case PCI_DID_INTEL_SPT_UART1: + case PCI_DID_INTEL_SPT_H_UART1: + case PCI_DID_INTEL_CNP_H_UART1: return "UAR1"; - case PCI_DEVICE_ID_INTEL_APL_UART2: - case PCI_DEVICE_ID_INTEL_GLK_UART2: - case PCI_DEVICE_ID_INTEL_SPT_UART2: - case PCI_DEVICE_ID_INTEL_SPT_H_UART2: - case PCI_DEVICE_ID_INTEL_CNP_H_UART2: + case PCI_DID_INTEL_APL_UART2: + case PCI_DID_INTEL_GLK_UART2: + case PCI_DID_INTEL_SPT_UART2: + case PCI_DID_INTEL_SPT_H_UART2: + case PCI_DID_INTEL_CNP_H_UART2: return "UAR2"; - case PCI_DEVICE_ID_INTEL_GLK_UART3: + case PCI_DID_INTEL_GLK_UART3: return "UAR3"; default: return NULL; @@ -344,75 +344,75 @@ static struct device_operations device_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_SPT_UART0, - PCI_DEVICE_ID_INTEL_SPT_UART1, - PCI_DEVICE_ID_INTEL_SPT_UART2, - PCI_DEVICE_ID_INTEL_SPT_H_UART0, - PCI_DEVICE_ID_INTEL_SPT_H_UART1, - PCI_DEVICE_ID_INTEL_SPT_H_UART2, - PCI_DEVICE_ID_INTEL_UPT_H_UART0, - PCI_DEVICE_ID_INTEL_UPT_H_UART1, - PCI_DEVICE_ID_INTEL_UPT_H_UART2, - PCI_DEVICE_ID_INTEL_APL_UART0, - PCI_DEVICE_ID_INTEL_APL_UART1, - PCI_DEVICE_ID_INTEL_APL_UART2, - PCI_DEVICE_ID_INTEL_APL_UART3, - PCI_DEVICE_ID_INTEL_CNL_UART0, - PCI_DEVICE_ID_INTEL_CNL_UART1, - PCI_DEVICE_ID_INTEL_CNL_UART2, - PCI_DEVICE_ID_INTEL_GLK_UART0, - PCI_DEVICE_ID_INTEL_GLK_UART1, - PCI_DEVICE_ID_INTEL_GLK_UART2, - PCI_DEVICE_ID_INTEL_GLK_UART3, - PCI_DEVICE_ID_INTEL_CNP_H_UART0, - PCI_DEVICE_ID_INTEL_CNP_H_UART1, - PCI_DEVICE_ID_INTEL_CNP_H_UART2, - PCI_DEVICE_ID_INTEL_ICP_UART0, - PCI_DEVICE_ID_INTEL_ICP_UART1, - PCI_DEVICE_ID_INTEL_ICP_UART2, - PCI_DEVICE_ID_INTEL_CMP_UART0, - PCI_DEVICE_ID_INTEL_CMP_UART1, - PCI_DEVICE_ID_INTEL_CMP_UART2, - PCI_DEVICE_ID_INTEL_CMP_H_UART0, - PCI_DEVICE_ID_INTEL_CMP_H_UART1, - PCI_DEVICE_ID_INTEL_CMP_H_UART2, - PCI_DEVICE_ID_INTEL_TGP_UART0, - PCI_DEVICE_ID_INTEL_TGP_UART1, - PCI_DEVICE_ID_INTEL_TGP_UART2, - PCI_DEVICE_ID_INTEL_TGP_H_UART0, - PCI_DEVICE_ID_INTEL_TGP_H_UART1, - PCI_DEVICE_ID_INTEL_TGP_H_UART2, - PCI_DEVICE_ID_INTEL_TGP_H_UART3, - PCI_DEVICE_ID_INTEL_MCC_UART0, - PCI_DEVICE_ID_INTEL_MCC_UART1, - PCI_DEVICE_ID_INTEL_MCC_UART2, - PCI_DEVICE_ID_INTEL_JSP_UART0, - PCI_DEVICE_ID_INTEL_JSP_UART1, - PCI_DEVICE_ID_INTEL_JSP_UART2, - PCI_DEVICE_ID_INTEL_ADP_S_UART0, - PCI_DEVICE_ID_INTEL_ADP_S_UART1, - PCI_DEVICE_ID_INTEL_ADP_S_UART2, - PCI_DEVICE_ID_INTEL_ADP_S_UART3, - PCI_DEVICE_ID_INTEL_ADP_S_UART4, - PCI_DEVICE_ID_INTEL_ADP_S_UART5, - PCI_DEVICE_ID_INTEL_ADP_S_UART6, - PCI_DEVICE_ID_INTEL_ADP_P_UART0, - PCI_DEVICE_ID_INTEL_ADP_P_UART1, - PCI_DEVICE_ID_INTEL_ADP_P_UART2, - PCI_DEVICE_ID_INTEL_ADP_P_UART3, - PCI_DEVICE_ID_INTEL_ADP_P_UART4, - PCI_DEVICE_ID_INTEL_ADP_P_UART5, - PCI_DEVICE_ID_INTEL_ADP_P_UART6, - PCI_DEVICE_ID_INTEL_ADP_M_N_UART0, - PCI_DEVICE_ID_INTEL_ADP_M_N_UART1, - PCI_DEVICE_ID_INTEL_ADP_M_N_UART2, - PCI_DEVICE_ID_INTEL_ADP_M_N_UART3, + PCI_DID_INTEL_SPT_UART0, + PCI_DID_INTEL_SPT_UART1, + PCI_DID_INTEL_SPT_UART2, + PCI_DID_INTEL_SPT_H_UART0, + PCI_DID_INTEL_SPT_H_UART1, + PCI_DID_INTEL_SPT_H_UART2, + PCI_DID_INTEL_UPT_H_UART0, + PCI_DID_INTEL_UPT_H_UART1, + PCI_DID_INTEL_UPT_H_UART2, + PCI_DID_INTEL_APL_UART0, + PCI_DID_INTEL_APL_UART1, + PCI_DID_INTEL_APL_UART2, + PCI_DID_INTEL_APL_UART3, + PCI_DID_INTEL_CNL_UART0, + PCI_DID_INTEL_CNL_UART1, + PCI_DID_INTEL_CNL_UART2, + PCI_DID_INTEL_GLK_UART0, + PCI_DID_INTEL_GLK_UART1, + PCI_DID_INTEL_GLK_UART2, + PCI_DID_INTEL_GLK_UART3, + PCI_DID_INTEL_CNP_H_UART0, + PCI_DID_INTEL_CNP_H_UART1, + PCI_DID_INTEL_CNP_H_UART2, + PCI_DID_INTEL_ICP_UART0, + PCI_DID_INTEL_ICP_UART1, + PCI_DID_INTEL_ICP_UART2, + PCI_DID_INTEL_CMP_UART0, + PCI_DID_INTEL_CMP_UART1, + PCI_DID_INTEL_CMP_UART2, + PCI_DID_INTEL_CMP_H_UART0, + PCI_DID_INTEL_CMP_H_UART1, + PCI_DID_INTEL_CMP_H_UART2, + PCI_DID_INTEL_TGP_UART0, + PCI_DID_INTEL_TGP_UART1, + PCI_DID_INTEL_TGP_UART2, + PCI_DID_INTEL_TGP_H_UART0, + PCI_DID_INTEL_TGP_H_UART1, + PCI_DID_INTEL_TGP_H_UART2, + PCI_DID_INTEL_TGP_H_UART3, + PCI_DID_INTEL_MCC_UART0, + PCI_DID_INTEL_MCC_UART1, + PCI_DID_INTEL_MCC_UART2, + PCI_DID_INTEL_JSP_UART0, + PCI_DID_INTEL_JSP_UART1, + PCI_DID_INTEL_JSP_UART2, + PCI_DID_INTEL_ADP_S_UART0, + PCI_DID_INTEL_ADP_S_UART1, + PCI_DID_INTEL_ADP_S_UART2, + PCI_DID_INTEL_ADP_S_UART3, + PCI_DID_INTEL_ADP_S_UART4, + PCI_DID_INTEL_ADP_S_UART5, + PCI_DID_INTEL_ADP_S_UART6, + PCI_DID_INTEL_ADP_P_UART0, + PCI_DID_INTEL_ADP_P_UART1, + PCI_DID_INTEL_ADP_P_UART2, + PCI_DID_INTEL_ADP_P_UART3, + PCI_DID_INTEL_ADP_P_UART4, + PCI_DID_INTEL_ADP_P_UART5, + PCI_DID_INTEL_ADP_P_UART6, + PCI_DID_INTEL_ADP_M_N_UART0, + PCI_DID_INTEL_ADP_M_N_UART1, + PCI_DID_INTEL_ADP_M_N_UART2, + PCI_DID_INTEL_ADP_M_N_UART3, 0, }; static const struct pci_driver pch_uart __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/usb4/usb4.c b/src/soc/intel/common/block/usb4/usb4.c index 0ec4d5fdf332..996e7f52ee7d 100644 --- a/src/soc/intel/common/block/usb4/usb4.c +++ b/src/soc/intel/common/block/usb4/usb4.c @@ -53,12 +53,12 @@ static void tbt_dma_fill_ssdt(const struct device *dev) #endif static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0, - PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1, - PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA0, - PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA1, - PCI_DEVICE_ID_INTEL_ADL_TBT_DMA0, - PCI_DEVICE_ID_INTEL_ADL_TBT_DMA1, + PCI_DID_INTEL_TGL_TBT_DMA0, + PCI_DID_INTEL_TGL_TBT_DMA1, + PCI_DID_INTEL_TGL_H_TBT_DMA0, + PCI_DID_INTEL_TGL_H_TBT_DMA1, + PCI_DID_INTEL_ADL_TBT_DMA0, + PCI_DID_INTEL_ADL_TBT_DMA1, 0 }; @@ -76,6 +76,6 @@ static struct device_operations usb4_dev_ops = { static const struct pci_driver usb4_driver __pci_driver = { .ops = &usb4_dev_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c index d0be8e5f9f92..ba6b83f1acac 100644 --- a/src/soc/intel/common/block/usb4/xhci.c +++ b/src/soc/intel/common/block/usb4/xhci.c @@ -26,14 +26,14 @@ static struct device_operations usb4_xhci_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI, - PCI_DEVICE_ID_INTEL_TGP_H_TCSS_XHCI, - PCI_DEVICE_ID_INTEL_ADP_TCSS_XHCI, + PCI_DID_INTEL_TGP_TCSS_XHCI, + PCI_DID_INTEL_TGP_H_TCSS_XHCI, + PCI_DID_INTEL_ADP_TCSS_XHCI, 0 }; static const struct pci_driver usb4_xhci __pci_driver = { .ops = &usb4_xhci_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c index 5322075d1689..4b751aea24dd 100644 --- a/src/soc/intel/common/block/xdci/xdci.c +++ b/src/soc/intel/common/block/xdci/xdci.c @@ -27,26 +27,26 @@ static struct device_operations usb_xdci_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_XDCI, - PCI_DEVICE_ID_INTEL_CNL_LP_XDCI, - PCI_DEVICE_ID_INTEL_GLK_XDCI, - PCI_DEVICE_ID_INTEL_SPT_LP_XDCI, - PCI_DEVICE_ID_INTEL_CNP_H_XDCI, - PCI_DEVICE_ID_INTEL_ICP_LP_XDCI, - PCI_DEVICE_ID_INTEL_CMP_LP_XDCI, - PCI_DEVICE_ID_INTEL_CMP_H_XDCI, - PCI_DEVICE_ID_INTEL_TGP_LP_XDCI, - PCI_DEVICE_ID_INTEL_TGP_H_XDCI, - PCI_DEVICE_ID_INTEL_MCC_XDCI, - PCI_DEVICE_ID_INTEL_JSP_XDCI, - PCI_DEVICE_ID_INTEL_ADP_P_XDCI, - PCI_DEVICE_ID_INTEL_ADP_S_XDCI, - PCI_DEVICE_ID_INTEL_ADP_M_XDCI, + PCI_DID_INTEL_APL_XDCI, + PCI_DID_INTEL_CNL_LP_XDCI, + PCI_DID_INTEL_GLK_XDCI, + PCI_DID_INTEL_SPT_LP_XDCI, + PCI_DID_INTEL_CNP_H_XDCI, + PCI_DID_INTEL_ICP_LP_XDCI, + PCI_DID_INTEL_CMP_LP_XDCI, + PCI_DID_INTEL_CMP_H_XDCI, + PCI_DID_INTEL_TGP_LP_XDCI, + PCI_DID_INTEL_TGP_H_XDCI, + PCI_DID_INTEL_MCC_XDCI, + PCI_DID_INTEL_JSP_XDCI, + PCI_DID_INTEL_ADP_P_XDCI, + PCI_DID_INTEL_ADP_S_XDCI, + PCI_DID_INTEL_ADP_M_XDCI, 0 }; static const struct pci_driver pch_usb_xdci __pci_driver = { .ops = &usb_xdci_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index 5b19fc9e3636..353840a2ca50 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -106,30 +106,30 @@ static struct device_operations usb_xhci_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_XHCI, - PCI_DEVICE_ID_INTEL_CNL_LP_XHCI, - PCI_DEVICE_ID_INTEL_GLK_XHCI, - PCI_DEVICE_ID_INTEL_SPT_LP_XHCI, - PCI_DEVICE_ID_INTEL_SPT_H_XHCI, - PCI_DEVICE_ID_INTEL_LWB_XHCI, - PCI_DEVICE_ID_INTEL_LWB_XHCI_SUPER, - PCI_DEVICE_ID_INTEL_UPT_H_XHCI, - PCI_DEVICE_ID_INTEL_CNP_H_XHCI, - PCI_DEVICE_ID_INTEL_ICP_LP_XHCI, - PCI_DEVICE_ID_INTEL_CMP_LP_XHCI, - PCI_DEVICE_ID_INTEL_CMP_H_XHCI, - PCI_DEVICE_ID_INTEL_TGP_LP_XHCI, - PCI_DEVICE_ID_INTEL_TGP_H_XHCI, - PCI_DEVICE_ID_INTEL_MCC_XHCI, - PCI_DEVICE_ID_INTEL_JSP_XHCI, - PCI_DEVICE_ID_INTEL_ADP_P_XHCI, - PCI_DEVICE_ID_INTEL_ADP_S_XHCI, - PCI_DEVICE_ID_INTEL_ADP_M_XHCI, + PCI_DID_INTEL_APL_XHCI, + PCI_DID_INTEL_CNL_LP_XHCI, + PCI_DID_INTEL_GLK_XHCI, + PCI_DID_INTEL_SPT_LP_XHCI, + PCI_DID_INTEL_SPT_H_XHCI, + PCI_DID_INTEL_LWB_XHCI, + PCI_DID_INTEL_LWB_XHCI_SUPER, + PCI_DID_INTEL_UPT_H_XHCI, + PCI_DID_INTEL_CNP_H_XHCI, + PCI_DID_INTEL_ICP_LP_XHCI, + PCI_DID_INTEL_CMP_LP_XHCI, + PCI_DID_INTEL_CMP_H_XHCI, + PCI_DID_INTEL_TGP_LP_XHCI, + PCI_DID_INTEL_TGP_H_XHCI, + PCI_DID_INTEL_MCC_XHCI, + PCI_DID_INTEL_JSP_XHCI, + PCI_DID_INTEL_ADP_P_XHCI, + PCI_DID_INTEL_ADP_S_XHCI, + PCI_DID_INTEL_ADP_M_XHCI, 0 }; static const struct pci_driver pch_usb_xhci __pci_driver = { .ops = &usb_xhci_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/denverton_ns/csme_ie_kt.c b/src/soc/intel/denverton_ns/csme_ie_kt.c index ce00627ba24d..0510ef2bb465 100644 --- a/src/soc/intel/denverton_ns/csme_ie_kt.c +++ b/src/soc/intel/denverton_ns/csme_ie_kt.c @@ -59,13 +59,13 @@ static struct device_operations csme_ie_kt_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_DNV_ME_KT, - PCI_DEVICE_ID_INTEL_DNV_IE_KT, + PCI_DID_INTEL_DNV_ME_KT, + PCI_DID_INTEL_DNV_IE_KT, 0 }; static const struct pci_driver csme_ie_kt __pci_driver = { .ops = &csme_ie_kt_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c index 50bf49de770a..38df89261e7d 100644 --- a/src/soc/intel/denverton_ns/lpc.c +++ b/src/soc/intel/denverton_ns/lpc.c @@ -534,8 +534,8 @@ static struct device_operations device_ops = { static const struct pci_driver lpc_driver __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_DNV_LPC, + .vendor = PCI_VID_INTEL, + .device = PCI_DID_INTEL_DNV_LPC, }; static void finalize_chipset(void *unused) diff --git a/src/soc/intel/denverton_ns/npk.c b/src/soc/intel/denverton_ns/npk.c index ea4816ef0509..151992376e99 100644 --- a/src/soc/intel/denverton_ns/npk.c +++ b/src/soc/intel/denverton_ns/npk.c @@ -30,6 +30,6 @@ static struct device_operations pmc_ops = { static const struct pci_driver pch_pmc __pci_driver = { .ops = &pmc_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_DNV_TRACEHUB, + .vendor = PCI_VID_INTEL, + .device = PCI_DID_INTEL_DNV_TRACEHUB, }; diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c index 1f551f833061..3fb5d75c324c 100644 --- a/src/soc/intel/denverton_ns/sata.c +++ b/src/soc/intel/denverton_ns/sata.c @@ -56,13 +56,13 @@ static struct device_operations sata_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_DNV_SATA_AHCI_1, - PCI_DEVICE_ID_INTEL_DNV_SATA_AHCI_2, + PCI_DID_INTEL_DNV_SATA_AHCI_1, + PCI_DID_INTEL_DNV_SATA_AHCI_2, 0 }; static const struct pci_driver soc_sata __pci_driver = { .ops = &sata_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c index 48b48610a3b1..16b73281b47b 100644 --- a/src/soc/intel/denverton_ns/systemagent.c +++ b/src/soc/intel/denverton_ns/systemagent.c @@ -333,13 +333,13 @@ static struct device_operations systemagent_ops = { /* IDs for System Agent device of Intel Denverton SoC */ static const unsigned short systemagent_ids[] = { - PCI_DEVICE_ID_INTEL_DNV_SA, - PCI_DEVICE_ID_INTEL_DNVAD_SA, + PCI_DID_INTEL_DNV_SA, + PCI_DID_INTEL_DNVAD_SA, 0 }; static const struct pci_driver systemagent_driver __pci_driver = { .ops = &systemagent_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = systemagent_ids }; diff --git a/src/soc/intel/denverton_ns/uart.c b/src/soc/intel/denverton_ns/uart.c index f9aa64a0cf26..b8598cc4efa8 100644 --- a/src/soc/intel/denverton_ns/uart.c +++ b/src/soc/intel/denverton_ns/uart.c @@ -44,8 +44,8 @@ static struct device_operations uart_ops = { static const struct pci_driver uart_driver __pci_driver = { .ops = &uart_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_DNV_HSUART + .vendor = PCI_VID_INTEL, + .device = PCI_DID_INTEL_DNV_HSUART }; static void hide_hsuarts(void) diff --git a/src/soc/intel/denverton_ns/xhci.c b/src/soc/intel/denverton_ns/xhci.c index 5e1e4263a4e0..2760120c2bea 100644 --- a/src/soc/intel/denverton_ns/xhci.c +++ b/src/soc/intel/denverton_ns/xhci.c @@ -31,6 +31,6 @@ static struct device_operations usb_xhci_ops = { static const struct pci_driver pch_usb_xhci __pci_driver = { .ops = &usb_xhci_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_DNV_XHCI, + .vendor = PCI_VID_INTEL, + .device = PCI_DID_INTEL_DNV_XHCI, }; diff --git a/src/soc/intel/elkhartlake/bootblock/report_platform.c b/src/soc/intel/elkhartlake/bootblock/report_platform.c index 9cb32ccd7270..cc3462d4e206 100644 --- a/src/soc/intel/elkhartlake/bootblock/report_platform.c +++ b/src/soc/intel/elkhartlake/bootblock/report_platform.c @@ -25,49 +25,49 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_EHL_ID_0, "Elkhartlake SKU-0" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_1, "Elkhartlake SKU-1" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_1A, "Elkhartlake SKU-1A" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_2, "Elkhartlake SKU-2" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_2_1, "Elkhartlake SKU-2" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_3, "Elkhartlake SKU-3" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_3A, "Elkhartlake SKU-3A" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_4, "Elkhartlake SKU-4" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_5, "Elkhartlake SKU-5" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_6, "Elkhartlake SKU-6" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_7, "Elkhartlake SKU-7" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_8, "Elkhartlake SKU-8" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_9, "Elkhartlake SKU-9" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_10, "Elkhartlake SKU-10" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_11, "Elkhartlake SKU-11" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_12, "Elkhartlake SKU-12" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_13, "Elkhartlake SKU-13" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_14, "Elkhartlake SKU-14" }, - { PCI_DEVICE_ID_INTEL_EHL_ID_15, "Elkhartlake SKU-15" }, + { PCI_DID_INTEL_EHL_ID_0, "Elkhartlake SKU-0" }, + { PCI_DID_INTEL_EHL_ID_1, "Elkhartlake SKU-1" }, + { PCI_DID_INTEL_EHL_ID_1A, "Elkhartlake SKU-1A" }, + { PCI_DID_INTEL_EHL_ID_2, "Elkhartlake SKU-2" }, + { PCI_DID_INTEL_EHL_ID_2_1, "Elkhartlake SKU-2" }, + { PCI_DID_INTEL_EHL_ID_3, "Elkhartlake SKU-3" }, + { PCI_DID_INTEL_EHL_ID_3A, "Elkhartlake SKU-3A" }, + { PCI_DID_INTEL_EHL_ID_4, "Elkhartlake SKU-4" }, + { PCI_DID_INTEL_EHL_ID_5, "Elkhartlake SKU-5" }, + { PCI_DID_INTEL_EHL_ID_6, "Elkhartlake SKU-6" }, + { PCI_DID_INTEL_EHL_ID_7, "Elkhartlake SKU-7" }, + { PCI_DID_INTEL_EHL_ID_8, "Elkhartlake SKU-8" }, + { PCI_DID_INTEL_EHL_ID_9, "Elkhartlake SKU-9" }, + { PCI_DID_INTEL_EHL_ID_10, "Elkhartlake SKU-10" }, + { PCI_DID_INTEL_EHL_ID_11, "Elkhartlake SKU-11" }, + { PCI_DID_INTEL_EHL_ID_12, "Elkhartlake SKU-12" }, + { PCI_DID_INTEL_EHL_ID_13, "Elkhartlake SKU-13" }, + { PCI_DID_INTEL_EHL_ID_14, "Elkhartlake SKU-14" }, + { PCI_DID_INTEL_EHL_ID_15, "Elkhartlake SKU-15" }, }; static struct { u16 espiid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_MCC_ESPI_0, "Elkhartlake-0" }, - { PCI_DEVICE_ID_INTEL_MCC_ESPI_1, "Elkhartlake-1" }, - { PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI, "Elkhartlake Base" }, - { PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI, "Elkhartlake Premium" }, - { PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI, "Elkhartlake Super" }, + { PCI_DID_INTEL_MCC_ESPI_0, "Elkhartlake-0" }, + { PCI_DID_INTEL_MCC_ESPI_1, "Elkhartlake-1" }, + { PCI_DID_INTEL_MCC_BASE_ESPI, "Elkhartlake Base" }, + { PCI_DID_INTEL_MCC_PREMIUM_ESPI, "Elkhartlake Premium" }, + { PCI_DID_INTEL_MCC_SUPER_ESPI, "Elkhartlake Super" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_EHL_GT1_1, "Elkhartlake GT1-1" }, - { PCI_DEVICE_ID_INTEL_EHL_GT2_1, "Elkhartlake GT2-1" }, - { PCI_DEVICE_ID_INTEL_EHL_GT1_2, "Elkhartlake GT1-2" }, - { PCI_DEVICE_ID_INTEL_EHL_GT1_2_1, "Elkhartlake GT1-2-1" }, - { PCI_DEVICE_ID_INTEL_EHL_GT2_2, "Elkhartlake GT2-2" }, - { PCI_DEVICE_ID_INTEL_EHL_GT1_3, "Elkhartlake GT1-3" }, - { PCI_DEVICE_ID_INTEL_EHL_GT2_3, "Elkhartlake GT2-3" }, + { PCI_DID_INTEL_EHL_GT1_1, "Elkhartlake GT1-1" }, + { PCI_DID_INTEL_EHL_GT2_1, "Elkhartlake GT2-1" }, + { PCI_DID_INTEL_EHL_GT1_2, "Elkhartlake GT1-2" }, + { PCI_DID_INTEL_EHL_GT1_2_1, "Elkhartlake GT1-2-1" }, + { PCI_DID_INTEL_EHL_GT2_2, "Elkhartlake GT2-2" }, + { PCI_DID_INTEL_EHL_GT1_3, "Elkhartlake GT1-3" }, + { PCI_DID_INTEL_EHL_GT2_3, "Elkhartlake GT2-3" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c index 8c6a6ef8dbae..2188009bd257 100644 --- a/src/soc/intel/icelake/bootblock/report_platform.c +++ b/src/soc/intel/icelake/bootblock/report_platform.c @@ -25,44 +25,44 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_ICL_ID_U, "Icelake-U" }, - { PCI_DEVICE_ID_INTEL_ICL_ID_U_2_2, "Icelake-U-2-2" }, - { PCI_DEVICE_ID_INTEL_ICL_ID_Y, "Icelake-Y" }, - { PCI_DEVICE_ID_INTEL_ICL_ID_Y_2, "Icelake-Y-2" }, + { PCI_DID_INTEL_ICL_ID_U, "Icelake-U" }, + { PCI_DID_INTEL_ICL_ID_U_2_2, "Icelake-U-2-2" }, + { PCI_DID_INTEL_ICL_ID_Y, "Icelake-Y" }, + { PCI_DID_INTEL_ICL_ID_Y_2, "Icelake-Y-2" }, }; static struct { u16 espiid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_ICL_BASE_U_ESPI, "Icelake-U Base" }, - { PCI_DEVICE_ID_INTEL_ICL_BASE_Y_ESPI, "Icelake-Y Base" }, - { PCI_DEVICE_ID_INTEL_ICL_U_PREMIUM_ESPI, "Icelake-U Premium" }, - { PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI, "Icelake-U Super" }, - { PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI_REV0, "Icelake-U Super REV0" }, - { PCI_DEVICE_ID_INTEL_ICL_SUPER_Y_ESPI, "Icelake-Y Super" }, - { PCI_DEVICE_ID_INTEL_ICL_Y_PREMIUM_ESPI, "Icelake-Y Premium" }, + { PCI_DID_INTEL_ICL_BASE_U_ESPI, "Icelake-U Base" }, + { PCI_DID_INTEL_ICL_BASE_Y_ESPI, "Icelake-Y Base" }, + { PCI_DID_INTEL_ICL_U_PREMIUM_ESPI, "Icelake-U Premium" }, + { PCI_DID_INTEL_ICL_U_SUPER_U_ESPI, "Icelake-U Super" }, + { PCI_DID_INTEL_ICL_U_SUPER_U_ESPI_REV0, "Icelake-U Super REV0" }, + { PCI_DID_INTEL_ICL_SUPER_Y_ESPI, "Icelake-Y Super" }, + { PCI_DID_INTEL_ICL_Y_PREMIUM_ESPI, "Icelake-Y Premium" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_ICL_GT0_ULT, "Icelake ULT GT0" }, - { PCI_DEVICE_ID_INTEL_ICL_GT0_5_ULT, "Icelake ULT GT0.5" }, - { PCI_DEVICE_ID_INTEL_ICL_GT1_ULT, "Icelake U GT1" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_0, "Icelake Y GT2" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_1, "Icelake Y GT2_1" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_1, "Icelake U GT2_1" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_2, "Icelake Y GT2_2" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_2, "Icelake U GT2_2" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_3, "Icelake Y GT2_3" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_3, "Icelake U GT2_3" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_4, "Icelake Y GT2_4" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_4, "Icelake U GT2_4" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_5, "Icelake Y GT2_5" }, - { PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_5, "Icelake U GT2_5" }, - { PCI_DEVICE_ID_INTEL_ICL_GT3_ULT, "Icelake U GT3" }, + { PCI_DID_INTEL_ICL_GT0_ULT, "Icelake ULT GT0" }, + { PCI_DID_INTEL_ICL_GT0_5_ULT, "Icelake ULT GT0.5" }, + { PCI_DID_INTEL_ICL_GT1_ULT, "Icelake U GT1" }, + { PCI_DID_INTEL_ICL_GT2_ULX_0, "Icelake Y GT2" }, + { PCI_DID_INTEL_ICL_GT2_ULX_1, "Icelake Y GT2_1" }, + { PCI_DID_INTEL_ICL_GT2_ULT_1, "Icelake U GT2_1" }, + { PCI_DID_INTEL_ICL_GT2_ULX_2, "Icelake Y GT2_2" }, + { PCI_DID_INTEL_ICL_GT2_ULT_2, "Icelake U GT2_2" }, + { PCI_DID_INTEL_ICL_GT2_ULX_3, "Icelake Y GT2_3" }, + { PCI_DID_INTEL_ICL_GT2_ULT_3, "Icelake U GT2_3" }, + { PCI_DID_INTEL_ICL_GT2_ULX_4, "Icelake Y GT2_4" }, + { PCI_DID_INTEL_ICL_GT2_ULT_4, "Icelake U GT2_4" }, + { PCI_DID_INTEL_ICL_GT2_ULX_5, "Icelake Y GT2_5" }, + { PCI_DID_INTEL_ICL_GT2_ULT_5, "Icelake U GT2_5" }, + { PCI_DID_INTEL_ICL_GT3_ULT, "Icelake U GT3" }, }; static uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/jasperlake/bootblock/report_platform.c b/src/soc/intel/jasperlake/bootblock/report_platform.c index 241e17285d96..0d2fe432fb30 100644 --- a/src/soc/intel/jasperlake/bootblock/report_platform.c +++ b/src/soc/intel/jasperlake/bootblock/report_platform.c @@ -24,28 +24,28 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_JSL_ID_1, "Jasperlake SKU4-1" }, - { PCI_DEVICE_ID_INTEL_JSL_ID_2, "Jasperlake SKU4-2" }, - { PCI_DEVICE_ID_INTEL_JSL_ID_3, "Jasperlake SKU2-1" }, - { PCI_DEVICE_ID_INTEL_JSL_ID_4, "Jasperlake SKU2-2" }, - { PCI_DEVICE_ID_INTEL_JSL_ID_5, "Jasperlake SKU4-3" }, + { PCI_DID_INTEL_JSL_ID_1, "Jasperlake SKU4-1" }, + { PCI_DID_INTEL_JSL_ID_2, "Jasperlake SKU4-2" }, + { PCI_DID_INTEL_JSL_ID_3, "Jasperlake SKU2-1" }, + { PCI_DID_INTEL_JSL_ID_4, "Jasperlake SKU2-2" }, + { PCI_DID_INTEL_JSL_ID_5, "Jasperlake SKU4-3" }, }; static struct { u16 espiid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_JSP_SUPER_ESPI, "Jasperlake Super" }, + { PCI_DID_INTEL_JSP_SUPER_ESPI, "Jasperlake Super" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_JSL_GT1, "Jasperlake GT1" }, - { PCI_DEVICE_ID_INTEL_JSL_GT2, "Jasperlake GT2" }, - { PCI_DEVICE_ID_INTEL_JSL_GT3, "Jasperlake GT3" }, - { PCI_DEVICE_ID_INTEL_JSL_GT4, "Jasperlake GT4" }, + { PCI_DID_INTEL_JSL_GT1, "Jasperlake GT1" }, + { PCI_DID_INTEL_JSL_GT2, "Jasperlake GT2" }, + { PCI_DID_INTEL_JSL_GT3, "Jasperlake GT3" }, + { PCI_DID_INTEL_JSL_GT4, "Jasperlake GT4" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/quark/ehci.c b/src/soc/intel/quark/ehci.c index e9fb91b0e420..3005610439c0 100644 --- a/src/soc/intel/quark/ehci.c +++ b/src/soc/intel/quark/ehci.c @@ -114,6 +114,6 @@ static struct device_operations device_ops = { static const struct pci_driver driver __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = EHCI_DEVID, }; diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c index e128a09fe656..4910f1b8c663 100644 --- a/src/soc/intel/quark/gpio_i2c.c +++ b/src/soc/intel/quark/gpio_i2c.c @@ -24,6 +24,6 @@ static struct device_operations device_ops = { static const struct pci_driver gfx_driver __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = I2CGPIO_DEVID, }; diff --git a/src/soc/intel/quark/lpc.c b/src/soc/intel/quark/lpc.c index ad974565791d..92b7249293ac 100644 --- a/src/soc/intel/quark/lpc.c +++ b/src/soc/intel/quark/lpc.c @@ -43,6 +43,6 @@ static struct device_operations device_ops = { static const struct pci_driver pmc __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = QUARK_V_LPC_DEVICE_ID_0, }; diff --git a/src/soc/intel/quark/northcluster.c b/src/soc/intel/quark/northcluster.c index fb9597710f02..5cb0c812d7a6 100644 --- a/src/soc/intel/quark/northcluster.c +++ b/src/soc/intel/quark/northcluster.c @@ -63,6 +63,6 @@ static struct device_operations nc_ops = { static const struct pci_driver systemagent_driver __pci_driver = { .ops = &nc_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = QUARK_MC_DEVICE_ID }; diff --git a/src/soc/intel/quark/sd.c b/src/soc/intel/quark/sd.c index b1f6583ce761..2a52ff3da01d 100644 --- a/src/soc/intel/quark/sd.c +++ b/src/soc/intel/quark/sd.c @@ -30,6 +30,6 @@ static const struct device_operations device_ops = { static const struct pci_driver pmc __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = 0x08A7, }; diff --git a/src/soc/intel/quark/spi.c b/src/soc/intel/quark/spi.c index d7e35cdb348a..cc284f33a7a9 100644 --- a/src/soc/intel/quark/spi.c +++ b/src/soc/intel/quark/spi.c @@ -224,7 +224,7 @@ void spi_init(void) /* Determine the base address of the SPI flash controller */ context = &spi_driver_context; - dev = dev_find_device(PCI_VENDOR_ID_INTEL, LPC_DEVID, NULL); + dev = dev_find_device(PCI_VID_INTEL, LPC_DEVID, NULL); rcba = pci_read_config32(dev, R_QNC_LPC_RCBA); if (!(rcba & B_QNC_LPC_RCBA_EN)) { printk(BIOS_ERR, "RBCA not enabled\n"); diff --git a/src/soc/intel/quark/uart.c b/src/soc/intel/quark/uart.c index cf363b1ac7eb..c045c34a7171 100644 --- a/src/soc/intel/quark/uart.c +++ b/src/soc/intel/quark/uart.c @@ -28,6 +28,6 @@ static struct device_operations device_ops = { static const struct pci_driver uart_driver __pci_driver = { .ops = &device_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = HSUART_DEVID, }; diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 4af51d60ffba..3cfac5eb4a7e 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -34,62 +34,62 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_SKL_ID_U, "Skylake-U" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_Y, "Skylake-Y" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_ULX, "Skylake-ULX" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_H_4, "Skylake-H (4 Core)" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" }, - { PCI_DEVICE_ID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core) / Skylake-DT" }, - { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, - { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, - { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, - { PCI_DEVICE_ID_INTEL_KBL_ID_H, "Kabylake-H" }, - { PCI_DEVICE_ID_INTEL_KBL_ID_S, "Kabylake-S" }, - { PCI_DEVICE_ID_INTEL_KBL_ID_DT, "Kabylake DT" }, - { PCI_DEVICE_ID_INTEL_KBL_ID_DT_2, "Kabylake DT 2" }, + { PCI_DID_INTEL_SKL_ID_U, "Skylake-U" }, + { PCI_DID_INTEL_SKL_ID_Y, "Skylake-Y" }, + { PCI_DID_INTEL_SKL_ID_ULX, "Skylake-ULX" }, + { PCI_DID_INTEL_SKL_ID_H_4, "Skylake-H (4 Core)" }, + { PCI_DID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, + { PCI_DID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" }, + { PCI_DID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" }, + { PCI_DID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core) / Skylake-DT" }, + { PCI_DID_INTEL_KBL_ID_U, "Kabylake-U" }, + { PCI_DID_INTEL_KBL_U_R, "Kabylake-R ULT"}, + { PCI_DID_INTEL_KBL_ID_Y, "Kabylake-Y" }, + { PCI_DID_INTEL_KBL_ID_H, "Kabylake-H" }, + { PCI_DID_INTEL_KBL_ID_S, "Kabylake-S" }, + { PCI_DID_INTEL_KBL_ID_DT, "Kabylake DT" }, + { PCI_DID_INTEL_KBL_ID_DT_2, "Kabylake DT 2" }, }; static struct { u16 lpcid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, "Skylake LP Sample" }, - { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, "Skylake-U Base" }, - { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, "Skylake-U Premium" }, - { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" }, - { PCI_DEVICE_ID_INTEL_SPT_H_H110, "H110" }, - { PCI_DEVICE_ID_INTEL_SPT_H_H170, "H170" }, - { PCI_DEVICE_ID_INTEL_SPT_H_Z170, "Z170" }, - { PCI_DEVICE_ID_INTEL_SPT_H_Q170, "Q170" }, - { PCI_DEVICE_ID_INTEL_SPT_H_Q150, "Q150" }, - { PCI_DEVICE_ID_INTEL_SPT_H_B150, "B150" }, - { PCI_DEVICE_ID_INTEL_SPT_H_C236, "C236" }, - { PCI_DEVICE_ID_INTEL_SPT_H_C232, "C232" }, - { PCI_DEVICE_ID_INTEL_SPT_H_QM170, "QM170" }, - { PCI_DEVICE_ID_INTEL_SPT_H_HM170, "HM170" }, - { PCI_DEVICE_ID_INTEL_SPT_H_CM236, "CM236" }, - { PCI_DEVICE_ID_INTEL_SPT_H_HM175, "HM175" }, - { PCI_DEVICE_ID_INTEL_SPT_H_QM175, "QM175" }, - { PCI_DEVICE_ID_INTEL_SPT_H_CM238, "CM238" }, - { PCI_DEVICE_ID_INTEL_UPT_H_Q270, "Q270" }, - { PCI_DEVICE_ID_INTEL_UPT_H_H270, "H270" }, - { PCI_DEVICE_ID_INTEL_UPT_H_Z270, "Z270" }, - { PCI_DEVICE_ID_INTEL_UPT_H_B250, "B250" }, - { PCI_DEVICE_ID_INTEL_UPT_H_Q250, "Q250" }, - { PCI_DEVICE_ID_INTEL_UPT_H_Z370, "Z370" }, - { PCI_DEVICE_ID_INTEL_UPT_H_H310C, "H310C" }, - { PCI_DEVICE_ID_INTEL_UPT_H_B365, "B365" }, - { PCI_DEVICE_ID_INTEL_UPT_LP_U_BASE, "Kabylake-U Base" }, - { PCI_DEVICE_ID_INTEL_UPT_LP_U_PREMIUM, "Kabylake-U Premium" }, - { PCI_DEVICE_ID_INTEL_UPT_LP_Y_PREMIUM, "Kabylake-Y Premium" }, - { PCI_DEVICE_ID_INTEL_UPT_LP_SUPER_SKU, "Kabylake Super Sku" }, - { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, + { PCI_DID_INTEL_SPT_LP_SAMPLE, "Skylake LP Sample" }, + { PCI_DID_INTEL_SPT_LP_U_BASE, "Skylake-U Base" }, + { PCI_DID_INTEL_SPT_LP_U_PREMIUM, "Skylake-U Premium" }, + { PCI_DID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" }, + { PCI_DID_INTEL_SPT_H_H110, "H110" }, + { PCI_DID_INTEL_SPT_H_H170, "H170" }, + { PCI_DID_INTEL_SPT_H_Z170, "Z170" }, + { PCI_DID_INTEL_SPT_H_Q170, "Q170" }, + { PCI_DID_INTEL_SPT_H_Q150, "Q150" }, + { PCI_DID_INTEL_SPT_H_B150, "B150" }, + { PCI_DID_INTEL_SPT_H_C236, "C236" }, + { PCI_DID_INTEL_SPT_H_C232, "C232" }, + { PCI_DID_INTEL_SPT_H_QM170, "QM170" }, + { PCI_DID_INTEL_SPT_H_HM170, "HM170" }, + { PCI_DID_INTEL_SPT_H_CM236, "CM236" }, + { PCI_DID_INTEL_SPT_H_HM175, "HM175" }, + { PCI_DID_INTEL_SPT_H_QM175, "QM175" }, + { PCI_DID_INTEL_SPT_H_CM238, "CM238" }, + { PCI_DID_INTEL_UPT_H_Q270, "Q270" }, + { PCI_DID_INTEL_UPT_H_H270, "H270" }, + { PCI_DID_INTEL_UPT_H_Z270, "Z270" }, + { PCI_DID_INTEL_UPT_H_B250, "B250" }, + { PCI_DID_INTEL_UPT_H_Q250, "Q250" }, + { PCI_DID_INTEL_UPT_H_Z370, "Z370" }, + { PCI_DID_INTEL_UPT_H_H310C, "H310C" }, + { PCI_DID_INTEL_UPT_H_B365, "B365" }, + { PCI_DID_INTEL_UPT_LP_U_BASE, "Kabylake-U Base" }, + { PCI_DID_INTEL_UPT_LP_U_PREMIUM, "Kabylake-U Premium" }, + { PCI_DID_INTEL_UPT_LP_Y_PREMIUM, "Kabylake-Y Premium" }, + { PCI_DID_INTEL_UPT_LP_SUPER_SKU, "Kabylake Super Sku" }, + { PCI_DID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, "Kabylake-Y iHDCP 2.2 Premium" }, - { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, + { PCI_DID_INTEL_SPT_LP_U_PREMIUM_HDCP22, "Kabylake-U iHDCP 2.2 Premium" }, - { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22, + { PCI_DID_INTEL_SPT_LP_U_BASE_HDCP22, "Kabylake-U iHDCP 2.2 Base" }, }; @@ -97,37 +97,37 @@ static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F" }, - { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2"}, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3" }, - { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E" }, - { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E" }, - { PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM, "Skylake Media Server GT3FE" }, - { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" }, - { PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E" }, - { PCI_DEVICE_ID_INTEL_KBL_GT1F_DT2, "Kaby Lake DT GT1F" }, - { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kaby Lake ULT GT1" }, - { PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_1, "Kaby Lake HALO GT1" }, - { PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_2, "Kaby Lake HALO GT1" }, - { PCI_DEVICE_ID_INTEL_KBL_GT1_SSRVM, "Kaby Lake SRV GT1" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_SSRVM, "Kaby Lake Media Server GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_SWSTM, "Kaby Lake Workstation GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, "Kaby Lake ULX GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, "Kaby Lake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, "Kaby Lake-R ULT GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, "Kaby Lake HALO GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, "Kaby Lake DT GT2" }, - { PCI_DEVICE_ID_INTEL_KBL_GT2F_SULTM, "Kaby Lake ULT GT2F" }, - { PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1, "Kaby Lake ULT (15W) GT3E" }, - { PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2, "Kaby Lake ULT (28W) GT3E" }, - { PCI_DEVICE_ID_INTEL_KBL_GT4_SHALM, "Kaby Lake HALO GT4" }, - { PCI_DEVICE_ID_INTEL_AML_GT2_ULX, "Amberlake ULX GT2" }, + { PCI_DID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F" }, + { PCI_DID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1" }, + { PCI_DID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F" }, + { PCI_DID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, + { PCI_DID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, + { PCI_DID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" }, + { PCI_DID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2"}, + { PCI_DID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, + { PCI_DID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3" }, + { PCI_DID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E" }, + { PCI_DID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E" }, + { PCI_DID_INTEL_SKL_GT3FE_SSRVM, "Skylake Media Server GT3FE" }, + { PCI_DID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" }, + { PCI_DID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E" }, + { PCI_DID_INTEL_KBL_GT1F_DT2, "Kaby Lake DT GT1F" }, + { PCI_DID_INTEL_KBL_GT1_SULTM, "Kaby Lake ULT GT1" }, + { PCI_DID_INTEL_KBL_GT1_SHALM_1, "Kaby Lake HALO GT1" }, + { PCI_DID_INTEL_KBL_GT1_SHALM_2, "Kaby Lake HALO GT1" }, + { PCI_DID_INTEL_KBL_GT1_SSRVM, "Kaby Lake SRV GT1" }, + { PCI_DID_INTEL_KBL_GT2_SSRVM, "Kaby Lake Media Server GT2" }, + { PCI_DID_INTEL_KBL_GT2_SWSTM, "Kaby Lake Workstation GT2" }, + { PCI_DID_INTEL_KBL_GT2_SULXM, "Kaby Lake ULX GT2" }, + { PCI_DID_INTEL_KBL_GT2_SULTM, "Kaby Lake ULT GT2" }, + { PCI_DID_INTEL_KBL_GT2_SULTMR, "Kaby Lake-R ULT GT2" }, + { PCI_DID_INTEL_KBL_GT2_SHALM, "Kaby Lake HALO GT2" }, + { PCI_DID_INTEL_KBL_GT2_DT2P2, "Kaby Lake DT GT2" }, + { PCI_DID_INTEL_KBL_GT2F_SULTM, "Kaby Lake ULT GT2F" }, + { PCI_DID_INTEL_KBL_GT3E_SULTM_1, "Kaby Lake ULT (15W) GT3E" }, + { PCI_DID_INTEL_KBL_GT3E_SULTM_2, "Kaby Lake ULT (28W) GT3E" }, + { PCI_DID_INTEL_KBL_GT4_SHALM, "Kaby Lake HALO GT4" }, + { PCI_DID_INTEL_AML_GT2_ULX, "Amberlake ULX GT2" }, }; static uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 98b469c1c900..cb669b1b74aa 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -87,8 +87,8 @@ u32 map_oprom_vendev(u32 vendev) u32 new_vendev = vendev; switch (vendev) { - case 0x80865916: /* PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM */ - case 0x80865917: /* PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR */ + case 0x80865916: /* PCI_DID_INTEL_KBL_GT2_SULTM */ + case 0x80865917: /* PCI_DID_INTEL_KBL_GT2_SULTMR */ new_vendev = SA_IGD_OPROM_VENDEV; break; } diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c index 89d85cffd7ff..a036a1b016c3 100644 --- a/src/soc/intel/skylake/vr_config.c +++ b/src/soc/intel/skylake/vr_config.c @@ -121,8 +121,8 @@ static uint16_t get_sku_icc_max(int domain) */ switch (mch_id) { - case PCI_DEVICE_ID_INTEL_SKL_ID_S_2: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_S: { + case PCI_DID_INTEL_SKL_ID_S_2: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_S: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 40, 48, 48); if (tdp >= 54) icc_max[VR_IA_CORE] = VR_CFG_AMP(58); @@ -131,9 +131,9 @@ static uint16_t get_sku_icc_max(int domain) return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_S_4: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_DT_2: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_DT: { + case PCI_DID_INTEL_SKL_ID_S_4: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_DT_2: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_DT: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 55, 45, 45); if (tdp >= 91) icc_max[VR_IA_CORE] = VR_CFG_AMP(100); @@ -155,7 +155,7 @@ static uint16_t get_sku_icc_max(int domain) return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_H_4: { + case PCI_DID_INTEL_SKL_ID_H_4: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 60, 94, 20); if (tdp >= 45) { icc_max[VR_IA_CORE] = VR_CFG_AMP(74); @@ -166,9 +166,9 @@ static uint16_t get_sku_icc_max(int domain) } return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_H_2: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_SKL_ID_H_EM: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_H: { + case PCI_DID_INTEL_SKL_ID_H_2: /* fallthrough */ + case PCI_DID_INTEL_SKL_ID_H_EM: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_H: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(6.6, 60, 55, 55); if (tdp >= 35) { if (tdp >= 45) @@ -179,11 +179,11 @@ static uint16_t get_sku_icc_max(int domain) return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_U: { + case PCI_DID_INTEL_SKL_ID_U: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(5.1, 29, 57, 19); if (tdp >= 28) icc_max[VR_IA_CORE] = VR_CFG_AMP(32); - else if (igd_id != PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1) { + else if (igd_id != PCI_DID_INTEL_SKL_GT3E_SULTM_1) { const uint16_t icc_max_gt2[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(4.5, 29, 31, 31); @@ -191,28 +191,28 @@ static uint16_t get_sku_icc_max(int domain) } return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_KBL_U_R: { + case PCI_DID_INTEL_KBL_U_R: { const uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(6, 64, 31, 31); return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_Y: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_Y: { + case PCI_DID_INTEL_SKL_ID_Y: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_Y: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(4.1, 24, 24, 24); - if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX) + if (igd_id == PCI_DID_INTEL_AML_GT2_ULX) icc_max[VR_IA_CORE] = VR_CFG_AMP(28); return icc_max[domain]; } - case PCI_DEVICE_ID_INTEL_KBL_ID_U: { + case PCI_DID_INTEL_KBL_ID_U: { uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(4.5, 32, 31, 31); - if (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM) + if (igd_id == PCI_DID_INTEL_KBL_GT1_SULTM) icc_max[VR_IA_CORE] = VR_CFG_AMP(29); - else if ((igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) || - (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2)) { + else if ((igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_1) || + (igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_2)) { const uint16_t icc_max_gt3[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(5.1, 32, 57, 19); @@ -240,24 +240,24 @@ static uint16_t get_sku_ac_dc_loadline(const int domain) } switch (mch_id) { - case PCI_DEVICE_ID_INTEL_SKL_ID_S_2: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_SKL_ID_S_4: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_S: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_DT: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_DT_2: { + case PCI_DID_INTEL_SKL_ID_S_2: /* fallthrough */ + case PCI_DID_INTEL_SKL_ID_S_4: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_S: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_DT: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_DT_2: { /* SA Loadline is not specified */ const uint16_t loadline[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_LOADLINE(0, 2.1, 3.1, 3.1); return loadline[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_H_2: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_SKL_ID_H_EM: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_SKL_ID_H_4: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_H: { + case PCI_DID_INTEL_SKL_ID_H_2: /* fallthrough */ + case PCI_DID_INTEL_SKL_ID_H_EM: /* fallthrough */ + case PCI_DID_INTEL_SKL_ID_H_4: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_H: { const uint16_t loadline[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_LOADLINE(10, 1.8, 2.65, 2.65); - if (igd_id == PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM) { + if (igd_id == PCI_DID_INTEL_SKL_GT4_SHALM) { const uint16_t loadline_gt4[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_LOADLINE(6, 1.6, 1.4, 6); return loadline_gt4[domain]; @@ -265,26 +265,26 @@ static uint16_t get_sku_ac_dc_loadline(const int domain) return loadline[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_Y: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_Y: { + case PCI_DID_INTEL_SKL_ID_Y: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_Y: { uint16_t loadline[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_LOADLINE(18, 5.9, 5.7, 5.7); - if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX) + if (igd_id == PCI_DID_INTEL_AML_GT2_ULX) loadline[VR_IA_CORE] = VR_CFG_MOHMS(4); return loadline[domain]; } - case PCI_DEVICE_ID_INTEL_SKL_ID_U: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_U_R: /* fallthrough */ - case PCI_DEVICE_ID_INTEL_KBL_ID_U: { + case PCI_DID_INTEL_SKL_ID_U: /* fallthrough */ + case PCI_DID_INTEL_KBL_U_R: /* fallthrough */ + case PCI_DID_INTEL_KBL_ID_U: { uint16_t loadline[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 3.1, 3.1); - if ((igd_id == PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1) || - (igd_id == PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2) || - (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) || - (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2)) { + if ((igd_id == PCI_DID_INTEL_SKL_GT3E_SULTM_1) || + (igd_id == PCI_DID_INTEL_SKL_GT3E_SULTM_2) || + (igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_1) || + (igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_2)) { loadline[VR_GT_UNSLICED] = VR_CFG_MOHMS(2); loadline[VR_GT_SLICED] = VR_CFG_MOHMS(6); } diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c index 109ab60d0275..af7a96ae4a2c 100644 --- a/src/soc/intel/tigerlake/bootblock/report_platform.c +++ b/src/soc/intel/tigerlake/bootblock/report_platform.c @@ -32,72 +32,72 @@ static struct { u16 mchid; const char *name; } mch_table[] = { - { PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1, "Tigerlake-H-6-1" }, - { PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1, "Tigerlake-H-8-1" }, + { PCI_DID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" }, + { PCI_DID_INTEL_TGL_ID_U_4_2, "Tigerlake-U-4-2" }, + { PCI_DID_INTEL_TGL_ID_Y_2_2, "Tigerlake-Y-2-2" }, + { PCI_DID_INTEL_TGL_ID_Y_4_2, "Tigerlake-Y-4-2" }, + { PCI_DID_INTEL_TGL_ID_H_6_1, "Tigerlake-H-6-1" }, + { PCI_DID_INTEL_TGL_ID_H_8_1, "Tigerlake-H-8-1" }, }; static struct { u16 espiid; const char *name; } pch_table[] = { - { PCI_DEVICE_ID_INTEL_TGP_ESPI_0, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_SUPER_U_ESPI, "Tigerlake-U Super SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_PREMIUM_U_ESPI, "Tigerlake-U Premium SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_BASE_U_ESPI, "Tigerlake-U Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_1, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_2, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_SUPER_Y_ESPI, "Tigerlake-Y Super SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_PREMIUM_Y_ESPI, "Tigerlake-Y Premium SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_3, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_4, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_5, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_6, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_7, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_8, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_9, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_10, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_11, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_12, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_13, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_14, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_15, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_16, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_17, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_18, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_19, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_20, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_21, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_22, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_23, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_24, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_25, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560, "Tigerlake-H B560" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510, "Tigerlake-H H510" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570, "Tigerlake-H H570" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570, "Tigerlake-H Q570" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580, "Tigerlake-H W580" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590, "Tigerlake-H Z590" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" }, - { PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" }, + { PCI_DID_INTEL_TGP_ESPI_0, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_SUPER_U_ESPI, "Tigerlake-U Super SKU" }, + { PCI_DID_INTEL_TGP_PREMIUM_U_ESPI, "Tigerlake-U Premium SKU" }, + { PCI_DID_INTEL_TGP_BASE_U_ESPI, "Tigerlake-U Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_1, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_2, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_SUPER_Y_ESPI, "Tigerlake-Y Super SKU" }, + { PCI_DID_INTEL_TGP_PREMIUM_Y_ESPI, "Tigerlake-Y Premium SKU" }, + { PCI_DID_INTEL_TGP_ESPI_3, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_4, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_5, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_6, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_7, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_8, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_9, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_10, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_11, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_12, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_13, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_14, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_15, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_16, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_17, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_18, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_19, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_20, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_21, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_22, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_23, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_24, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_25, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" }, + { PCI_DID_INTEL_TGP_H_ESPI_B560, "Tigerlake-H B560" }, + { PCI_DID_INTEL_TGP_H_ESPI_H510, "Tigerlake-H H510" }, + { PCI_DID_INTEL_TGP_H_ESPI_H570, "Tigerlake-H H570" }, + { PCI_DID_INTEL_TGP_H_ESPI_Q570, "Tigerlake-H Q570" }, + { PCI_DID_INTEL_TGP_H_ESPI_W580, "Tigerlake-H W580" }, + { PCI_DID_INTEL_TGP_H_ESPI_Z590, "Tigerlake-H Z590" }, + { PCI_DID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" }, + { PCI_DID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" }, + { PCI_DID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" }, }; static struct { u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_TGL_GT0, "Tigerlake U GT0" }, - { PCI_DEVICE_ID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" }, - { PCI_DEVICE_ID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" }, - { PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" }, - { PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" }, - { PCI_DEVICE_ID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" }, - { PCI_DEVICE_ID_INTEL_TGL_GT2_ULT_1, "Tigerlake U GT2 1" }, + { PCI_DID_INTEL_TGL_GT0, "Tigerlake U GT0" }, + { PCI_DID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" }, + { PCI_DID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" }, + { PCI_DID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" }, + { PCI_DID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" }, + { PCI_DID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" }, + { PCI_DID_INTEL_TGL_GT2_ULT_1, "Tigerlake U GT2 1" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/tigerlake/lpm.c b/src/soc/intel/tigerlake/lpm.c index 92279d682b97..0dd725abb9fa 100644 --- a/src/soc/intel/tigerlake/lpm.c +++ b/src/soc/intel/tigerlake/lpm.c @@ -20,8 +20,8 @@ static bool platform_is_up3(void) if ((cpu_id != CPUID_TIGERLAKE_A0) && (cpu_id != CPUID_TIGERLAKE_B0)) return false; - return ((mchid == PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2) || - (mchid == PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2)); + return ((mchid == PCI_DID_INTEL_TGL_ID_U_2_2) || + (mchid == PCI_DID_INTEL_TGL_ID_U_4_2)); } int get_supported_lpm_mask(struct soc_intel_tigerlake_config *config) diff --git a/src/soc/intel/tigerlake/systemagent.c b/src/soc/intel/tigerlake/systemagent.c index 0e9488c1b224..06282eaaba64 100644 --- a/src/soc/intel/tigerlake/systemagent.c +++ b/src/soc/intel/tigerlake/systemagent.c @@ -78,22 +78,22 @@ void soc_systemagent_init(struct device *dev) * differentiated here based on SA PCI ID. */ switch (sa_pci_id) { - case PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2: + case PCI_DID_INTEL_TGL_ID_U_2_2: soc_config = &config->power_limits_config[POWER_LIMITS_U_2_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2: + case PCI_DID_INTEL_TGL_ID_U_4_2: soc_config = &config->power_limits_config[POWER_LIMITS_U_4_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2: + case PCI_DID_INTEL_TGL_ID_Y_2_2: soc_config = &config->power_limits_config[POWER_LIMITS_Y_2_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2: + case PCI_DID_INTEL_TGL_ID_Y_4_2: soc_config = &config->power_limits_config[POWER_LIMITS_Y_4_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1: + case PCI_DID_INTEL_TGL_ID_H_6_1: soc_config = &config->power_limits_config[POWER_LIMITS_H_6_CORE]; break; - case PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1: + case PCI_DID_INTEL_TGL_ID_H_8_1: soc_config = &config->power_limits_config[POWER_LIMITS_H_8_CORE]; break; default: diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c index 41dde0d84ba4..4b1543561981 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.c +++ b/src/soc/intel/xeon_sp/cpx/chip.c @@ -145,14 +145,14 @@ static void set_pcu_locks(void) static void set_imc_locks(void) { struct device *dev = 0; - while ((dev = dev_find_device(PCI_VENDOR_ID_INTEL, IMC_M2MEM_DEVID, dev))) + while ((dev = dev_find_device(PCI_VID_INTEL, IMC_M2MEM_DEVID, dev))) pci_or_config32(dev, IMC_M2MEM_TIMEOUT, TIMEOUT_LOCK); } static void set_upi_locks(void) { struct device *dev = 0; - while ((dev = dev_find_device(PCI_VENDOR_ID_INTEL, UPI_LL_CR_DEVID, dev))) + while ((dev = dev_find_device(PCI_VID_INTEL, UPI_LL_CR_DEVID, dev))) pci_or_config32(dev, UPI_LL_CR_KTIMISCMODLCK, KTIMISCMODLCK_LOCK); } diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 29c45cdf748e..e1931b1d3a2b 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -296,7 +296,7 @@ static const unsigned short mmapvtd_ids[] = { static const struct pci_driver mmapvtd_driver __pci_driver = { .ops = &mmapvtd_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = mmapvtd_ids }; @@ -317,7 +317,7 @@ static struct device_operations vtd_ops = { /* VTD devices on other stacks */ static const struct pci_driver vtd_driver __pci_driver = { .ops = &vtd_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = MMAP_VTD_STACK_CFG_REG_DEVID, }; @@ -345,7 +345,7 @@ static struct device_operations dmi3_ops = { static const struct pci_driver dmi3_driver __pci_driver = { .ops = &dmi3_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .device = DMI3_DEVID, }; @@ -379,6 +379,6 @@ static struct device_operations iio_dfx_global_ops = { static const struct pci_driver iio_dfx_global_driver __pci_driver = { .ops = &iio_dfx_global_ops, - .vendor = PCI_VENDOR_ID_INTEL, + .vendor = PCI_VID_INTEL, .devices = iio_dfx_global_ids, }; |