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| author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-10-14 21:43:11 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-15 20:04:44 +0000 |
| commit | 4e379a237466f4c96546a758ae86f17c7d26eed6 (patch) | |
| tree | dae831377238a44ec8f15f7a3da08877a9985f61 /src/soc | |
| parent | f38fbbec2c0061d122466cec346c2634aa26e236 (diff) | |
| download | coreboot-4e379a237466f4c96546a758ae86f17c7d26eed6.tar.gz coreboot-4e379a237466f4c96546a758ae86f17c7d26eed6.tar.bz2 coreboot-4e379a237466f4c96546a758ae86f17c7d26eed6.zip | |
soc/amd: make configure_espi_with_mb_hook call conditional
If a system doesn't use eSPI or has the eSPI interface already
configured in verstage on PSP, not calling configure_espi_with_mb_hook
from fch_pre_init makes it a bit more obvious that the eSPI interface
initialization will be skipped.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia77b83d56a5dab1bac6cfbbd92d33aa60a9e8b89
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 8 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/espi.h | 8 | ||||
| -rw-r--r-- | src/soc/amd/picasso/early_fch.c | 7 |
3 files changed, 13 insertions, 10 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index f97f57c8462c..f06d5767e968 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -40,8 +40,12 @@ void fch_pre_init(void) enable_acpimmio_decode_pm04(); /* Setup SPI base by calling lpc_early_init before setting up eSPI. */ lpc_early_init(); - /* Setup eSPI to enable port80 routing. */ - configure_espi_with_mb_hook(); + + /* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI + interface hasn't already been set up in verstage on PSP */ + if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) + configure_espi_with_mb_hook(); + fch_spi_early_init(); fch_smbus_init(); fch_enable_cf9_io(); diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h index 0f8066b2a679..e12b1b848656 100644 --- a/src/soc/amd/common/block/include/amdblocks/espi.h +++ b/src/soc/amd/common/block/include/amdblocks/espi.h @@ -134,12 +134,8 @@ void mb_set_up_early_espi(void); /* Setup eSPI with any mainboard specific initialization. */ static inline void configure_espi_with_mb_hook(void) { - /* If eSPI is setup in PSP Verstage, continue with that. Else setup eSPI to perform - port80h routing as early as possible. */ - if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) { - mb_set_up_early_espi(); - espi_setup(); - } + mb_set_up_early_espi(); + espi_setup(); } #endif /* AMD_BLOCK_ESPI_H */ diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index 83b4ae4579a0..2a1b5c971ac6 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -47,8 +47,11 @@ void fch_pre_init(void) enable_acpimmio_decode_pm04(); /* Setup SPI base by calling lpc_early_init before setting up eSPI. */ lpc_early_init(); - /* Setup eSPI to enable port80 routing. */ - configure_espi_with_mb_hook(); + + /* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI + interface hasn't already been set up in verstage on PSP */ + if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) + configure_espi_with_mb_hook(); if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) lpc_configure_decodes(); |