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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-02-04 12:45:37 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-03-09 18:03:28 +0000 |
| commit | 6f73a202d3df000fb2fd83080e0b148add344485 (patch) | |
| tree | 38df353a956e61505437c454d8aebc1c6efdc1cc /src/soc | |
| parent | 797a110856a5d2021bbad0d28f4aee357d48cee1 (diff) | |
| download | coreboot-6f73a202d3df000fb2fd83080e0b148add344485.tar.gz coreboot-6f73a202d3df000fb2fd83080e0b148add344485.tar.bz2 coreboot-6f73a202d3df000fb2fd83080e0b148add344485.zip | |
drivers/wifi,soc/intel/adl: Move CnviDdrRfim property to drivers
Some non-SoC code might want to know whether or not the CNVi DDR RFIM
feature is enabled. Also note that future SoCs may also support this
feature. To make the CnviDdrRfim property generic, move it from
soc/intel/alderlake to drivers/wifi/generic instead.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Idf9fba0a79d1f431269be5851b026ed966600160
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 9 |
2 files changed, 8 insertions, 6 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 67664061c884..7a169025e4f4 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -559,11 +559,6 @@ struct soc_intel_alderlake_config { * 0: Fast/2, 1: Fast/4, 2: Fast/8, 3: Fast/16; see enum slew_rate for values */ uint8_t SlowSlewRate[NUM_VR_DOMAINS]; - - /* CNVi DDR RFIM Enable/Disable - * Default 0. Setting this to 1 enable CNVi DDR RFIM. - */ - bool CnviDdrRfim; }; typedef struct soc_intel_alderlake_config config_t; diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index e0f5eb79e7ef..3483abddd732 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -5,6 +5,7 @@ #include <cpu/x86/msr.h> #include <cpu/intel/cpu_ids.h> #include <device/device.h> +#include <drivers/wifi/generic/wifi.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> #include <intelblocks/pcie_rp.h> @@ -208,7 +209,13 @@ static void fill_fspm_misc_params(FSP_M_CONFIG *m_cfg, m_cfg->GpioOverride = 0x1; /* CNVi DDR RFI Mitigation */ - m_cfg->CnviDdrRfim = config->CnviDdrRfim; + const struct device_path path[] = { + { .type = DEVICE_PATH_PCI, .pci.devfn = PCH_DEVFN_CNVI_WIFI }, + { .type = DEVICE_PATH_GENERIC, .generic.id = 0 } }; + const struct device *dev = find_dev_nested_path(pci_root_bus(), path, + ARRAY_SIZE(path)); + if (is_dev_enabled(dev)) + m_cfg->CnviDdrRfim = wifi_generic_cnvi_ddr_rfim_enabled(dev); } static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg, |