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| author | Elyes Haouas <ehaouas@noos.fr> | 2023-07-09 10:26:07 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-09 22:01:44 +0000 |
| commit | 8e9906c19abf91d20a75ac24cfc7bd5637c2fbb5 (patch) | |
| tree | 8c950e2c3273bfefea938f98f1d26e3af0836650 /src/soc | |
| parent | 0648267c1a77d3f3f41547ede3a19a832842cf6e (diff) | |
| download | coreboot-8e9906c19abf91d20a75ac24cfc7bd5637c2fbb5.tar.gz coreboot-8e9906c19abf91d20a75ac24cfc7bd5637c2fbb5.tar.bz2 coreboot-8e9906c19abf91d20a75ac24cfc7bd5637c2fbb5.zip | |
treewide: Get rid of "NO_DDRx" selection
Change-Id: I8fa26e7a398eee855c31a76f0f89b4111368c2a6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/amd/glinda/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/phoenix/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/Kconfig | 4 |
7 files changed, 0 insertions, 27 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index e861c14487ef..2c6e9497c4b5 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -17,9 +17,6 @@ config SOC_AMD_CEZANNE select HAVE_FSP_GOP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select NO_DDR5 - select NO_DDR3 - select NO_DDR2 select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index fe20591f0577..f76f27e5d65f 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -20,10 +20,6 @@ config SOC_AMD_GLINDA select HAVE_FSP_GOP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select NO_DDR4 - select NO_DDR3 - select NO_DDR2 - select NO_LPDDR4 select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index 6f3c0ca48494..189c6b9be965 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -18,10 +18,6 @@ config SOC_AMD_REMBRANDT_BASE select HAVE_FSP_GOP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select NO_DDR4 - select NO_DDR3 - select NO_DDR2 - select NO_LPDDR4 select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index 5f4e5d174e48..b50646492803 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -21,10 +21,6 @@ config SOC_AMD_PHOENIX select HAVE_FSP_GOP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select NO_DDR4 - select NO_DDR3 - select NO_DDR2 - select NO_LPDDR4 select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 33375bd569a8..9051b437cb22 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -16,10 +16,6 @@ config SOC_AMD_PICASSO select HAVE_EM100_SUPPORT select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select NO_DDR5 - select NO_DDR3 - select NO_DDR2 - select NO_LPDDR4 select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 0eeef09ec302..6091dce1e40b 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -11,10 +11,6 @@ config SOC_AMD_STONEYRIDGE select HAVE_CF9_RESET select HAVE_SMI_HANDLER select HAVE_USBDEBUG_OPTIONS - select NO_DDR5 - select NO_DDR3 - select NO_DDR2 - select NO_LPDDR4 select PARALLEL_MP_AP_WORK select RTC select SOC_AMD_PI diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 7cacdc0909dc..f3c914c7efa2 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -37,11 +37,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_COMMON select CPU_HAS_L2_ENABLE_MSR select TCO_SPACE_NOT_YET_SPLIT - select NO_DDR5 - select NO_LPDDR4 - select NO_DDR4 select USE_DDR3 - select NO_DDR2 config VBOOT select VBOOT_MUST_REQUEST_DISPLAY |