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| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-07-21 14:08:08 -0700 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-28 14:57:59 +0000 |
| commit | cd6a2ad1b2d3444e815fb9b1a6ec1c98e0403c23 (patch) | |
| tree | 1b5d0397789bfef4363c84d28b2b75d3c2945a51 /src/soc | |
| parent | 117770d32468e63df37aee1c041b5dc7cc1d56d2 (diff) | |
| download | coreboot-cd6a2ad1b2d3444e815fb9b1a6ec1c98e0403c23.tar.gz coreboot-cd6a2ad1b2d3444e815fb9b1a6ec1c98e0403c23.tar.bz2 coreboot-cd6a2ad1b2d3444e815fb9b1a6ec1c98e0403c23.zip | |
soc/intel/alderlake: Set Energy Perf Bias appropriate default value
The current "normal" EPB (six) setting resulted in the desired out of
box power and performance for several CPU generations.
However, a power and performance analysis on Alder Lake and Raptor
Lake CPUs demonstrates that this value results in undesirable higher
uncore power and that seven is a more appropriate value.
Note: the Linux kernel "4ecc933b x86: intel_epb: Allow model specific
normal EPB value" patch sets the EPB to 7 for Alder Lake.
BRANCH=firmware-brya-14505.B
BUG=b:239853069
TEST=verify that EPB is set by coreboot
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I5784656903d4c58bedc5063ee3ef310a99711050
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66059
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/alderlake/cpu.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 7308185be7b8..f9e8f6f2faa3 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -129,8 +129,9 @@ void soc_core_init(struct device *cpu) /* Enable Direct Cache Access */ configure_dca_cap(); - /* Set energy policy */ - set_energy_perf_bias(ENERGY_POLICY_NORMAL); + /* Set energy policy. The "normal" EPB (6) is not suitable for Alder + * Lake or Raptor Lake CPUs, as this results in higher uncore power. */ + set_energy_perf_bias(7); const config_t *conf = config_of_soc(); /* Set energy-performance preference */ |