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authorFelix Held <felix-coreboot@felixheld.de>2020-09-11 15:47:09 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-09-12 14:59:33 +0000
commite3a1247b15e756f01d9c25bc71fa2cf563de34a8 (patch)
treeb5b3757f41355f0e046968f4bdf3c06b51941914 /src/soc
parent8395165eee0ab487993e78de52a63dbc669f6684 (diff)
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include/console/uart: make index parameter unsigned
The UART index is never negative, so make it unsigned and drop the checks for the index to be non-negative. Change-Id: I64bd60bd2a3b82552cb3ac6524792b9ac6c09a94 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45294 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/picasso/uart_console.c2
-rw-r--r--src/soc/amd/stoneyridge/uart.c2
-rw-r--r--src/soc/cavium/cn81xx/uart.c2
-rw-r--r--src/soc/intel/common/block/uart/uart.c2
-rw-r--r--src/soc/intel/denverton_ns/uart_debug.c4
-rw-r--r--src/soc/intel/quark/uart_common.c2
-rw-r--r--src/soc/mediatek/common/uart.c8
-rw-r--r--src/soc/nvidia/tegra124/uart.c12
-rw-r--r--src/soc/nvidia/tegra210/uart.c8
-rw-r--r--src/soc/qualcomm/ipq40xx/uart.c8
-rw-r--r--src/soc/qualcomm/ipq806x/uart.c8
-rw-r--r--src/soc/qualcomm/qcs405/uart.c8
-rw-r--r--src/soc/qualcomm/sc7180/qupv3_uart.c10
-rw-r--r--src/soc/qualcomm/sc7180/uart_bitbang.c8
-rw-r--r--src/soc/qualcomm/sdm845/uart_bitbang.c8
-rw-r--r--src/soc/rockchip/common/uart.c2
-rw-r--r--src/soc/samsung/exynos5250/uart.c10
-rw-r--r--src/soc/samsung/exynos5420/uart.c10
-rw-r--r--src/soc/sifive/fu540/uart.c2
-rw-r--r--src/soc/ti/am335x/uart.c10
20 files changed, 63 insertions, 63 deletions
diff --git a/src/soc/amd/picasso/uart_console.c b/src/soc/amd/picasso/uart_console.c
index 3ab2a70920c0..b5c51594861a 100644
--- a/src/soc/amd/picasso/uart_console.c
+++ b/src/soc/amd/picasso/uart_console.c
@@ -8,7 +8,7 @@
* be provided exactly once and only by the UART that is used for console.
*/
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
return get_uart_base(idx);
}
diff --git a/src/soc/amd/stoneyridge/uart.c b/src/soc/amd/stoneyridge/uart.c
index ab129c5f054d..73346ab658ce 100644
--- a/src/soc/amd/stoneyridge/uart.c
+++ b/src/soc/amd/stoneyridge/uart.c
@@ -3,7 +3,7 @@
#include <console/uart.h>
#include <soc/southbridge.h>
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
if (CONFIG_UART_FOR_CONSOLE < 0 || CONFIG_UART_FOR_CONSOLE > 1)
return 0;
diff --git a/src/soc/cavium/cn81xx/uart.c b/src/soc/cavium/cn81xx/uart.c
index 03f94d57ac18..4e5fd82a3749 100644
--- a/src/soc/cavium/cn81xx/uart.c
+++ b/src/soc/cavium/cn81xx/uart.c
@@ -94,7 +94,7 @@ unsigned int uart_platform_refclk(void)
return uart_hclk(uart);
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 5507663a5a96..142a9365a96b 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -37,7 +37,7 @@ static void uart_lpss_init(const struct device *dev, uintptr_t baseaddr)
}
#if CONFIG(INTEL_LPSS_UART_FOR_CONSOLE)
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
if (idx == CONFIG_UART_FOR_CONSOLE)
return CONFIG_CONSOLE_UART_BASE_ADDRESS;
diff --git a/src/soc/intel/denverton_ns/uart_debug.c b/src/soc/intel/denverton_ns/uart_debug.c
index 8ee02cca7f85..acd1f038c366 100644
--- a/src/soc/intel/denverton_ns/uart_debug.c
+++ b/src/soc/intel/denverton_ns/uart_debug.c
@@ -8,9 +8,9 @@
#define MY_PCI_DEV(SEGBUS, DEV, FN) \
((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12))
-uintptr_t uart_platform_base(int idx);
+uintptr_t uart_platform_base(unsigned int idx);
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
return (uintptr_t)pci_io_read_config32(
MY_PCI_DEV(0, CONFIG_HSUART_DEV, idx),
diff --git a/src/soc/intel/quark/uart_common.c b/src/soc/intel/quark/uart_common.c
index 8696277ce11e..19ca745ca197 100644
--- a/src/soc/intel/quark/uart_common.c
+++ b/src/soc/intel/quark/uart_common.c
@@ -8,7 +8,7 @@ unsigned int uart_platform_refclk(void)
return 44236800;
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
return UART_BASE_ADDRESS;
}
diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c
index 99cba13b24e5..ba3c71a8c685 100644
--- a/src/soc/mediatek/common/uart.c
+++ b/src/soc/mediatek/common/uart.c
@@ -139,22 +139,22 @@ static int mtk_uart_tst_byte(void)
return (read8(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
mtk_uart_init();
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
return mtk_uart_rx_byte();
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
mtk_uart_tx_byte(data);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
mtk_uart_tx_flush();
}
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index d016cc26180e..4f24c0da6630 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -76,12 +76,12 @@ static int tegra124_uart_tst_byte(struct tegra124_uart *uart_ptr)
return (read8(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR;
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
//Default to UART A
unsigned int base = 0x70006000;
//UARTs A - E are mapped as index 0 - 4
- if ((idx < 5) && (idx >= 0)) {
+ if ((idx < 5)) {
if (idx != 1) { //not UART B
base += idx * 0x100;
} else {
@@ -91,25 +91,25 @@ uintptr_t uart_platform_base(int idx)
return base;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx);
tegra124_uart_init(uart_ptr);
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx);
return tegra124_uart_rx_byte(uart_ptr);
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx);
tegra124_uart_tx_byte(uart_ptr, data);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx);
tegra124_uart_tx_flush(uart_ptr);
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 865e1fafe197..7dbaf7b207a8 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -82,22 +82,22 @@ static int tegra210_uart_tst_byte(void)
return (read8(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
tegra210_uart_init();
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
tegra210_uart_tx_byte(data);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
tegra210_uart_tx_flush();
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
return tegra210_uart_rx_byte();
}
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 265c25e28b03..9c506111faff 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -87,7 +87,7 @@ static int valid_data = 0;
/* Received data */
static unsigned int word = 0;
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
int num_of_chars = 1;
void *base = uart_board_param.uart_dm_base;
@@ -195,7 +195,7 @@ unsigned int msm_boot_uart_dm_init(void *uart_dm_base)
*
* Initializes clocks, GPIO and UART controller.
*/
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
/* Note int idx isn't used in this driver. */
void *dm_base;
@@ -230,7 +230,7 @@ void ipq40xx_uart_init(void)
* @brief uart_tx_flush - transmits a string of data
* @param idx: string to transmit
*/
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
void *base = uart_board_param.uart_dm_base;
@@ -244,7 +244,7 @@ void uart_tx_flush(int idx)
*
* Returns the character read from serial port.
*/
-uint8_t uart_rx_byte(int idx)
+uint8_t uart_rx_byte(unsigned int idx)
{
uint8_t byte;
diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c
index ea564b35270b..3a3a8bf27b76 100644
--- a/src/soc/qualcomm/ipq806x/uart.c
+++ b/src/soc/qualcomm/ipq806x/uart.c
@@ -160,7 +160,7 @@ msm_boot_uart_dm_read(unsigned int *data, int *count, int wait)
}
#endif
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
int num_of_chars = 1;
unsigned int tx_data = 0;
@@ -269,7 +269,7 @@ static unsigned int msm_boot_uart_dm_init(void *uart_dm_base)
*
* Initializes clocks, GPIO and UART controller.
*/
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
/* Note int idx isn't used in this driver. */
void *dm_base;
@@ -316,7 +316,7 @@ uint32_t uartmem_getbaseaddr(void)
* uart_tx_flush - transmits a string of data
* @s: string to transmit
*/
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
void *base = uart_board_param.uart_dm_base;
@@ -351,7 +351,7 @@ int uart_can_rx_byte(void)
*
* Returns the character read from serial port.
*/
-uint8_t uart_rx_byte(int idx)
+uint8_t uart_rx_byte(unsigned int idx)
{
uint8_t byte;
diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c
index 1229053783fa..ac72998cb602 100644
--- a/src/soc/qualcomm/qcs405/uart.c
+++ b/src/soc/qualcomm/qcs405/uart.c
@@ -90,7 +90,7 @@ static int valid_data = 0;
static unsigned int word = 0;
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
int num_of_chars = 1;
void *base = uart_board_param.uart_dm_base;
@@ -199,7 +199,7 @@ unsigned int msm_boot_uart_dm_init(void *uart_dm_base)
*
* Initializes clocks, GPIO and UART controller.
*/
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
/* Note int idx isn't used in this driver. */
void *dm_base;
@@ -231,7 +231,7 @@ void qcs405_uart_init(void)
* @brief uart_tx_flush - transmits a string of data
* @param idx: string to transmit
*/
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
void *base = uart_board_param.uart_dm_base;
@@ -246,7 +246,7 @@ void uart_tx_flush(int idx)
*
* Returns the character read from serial port.
*/
-uint8_t uart_rx_byte(int idx)
+uint8_t uart_rx_byte(unsigned int idx)
{
uint8_t byte;
diff --git a/src/soc/qualcomm/sc7180/qupv3_uart.c b/src/soc/qualcomm/sc7180/qupv3_uart.c
index f9d99bb71e2a..bf274c23c948 100644
--- a/src/soc/qualcomm/sc7180/qupv3_uart.c
+++ b/src/soc/qualcomm/sc7180/qupv3_uart.c
@@ -34,7 +34,7 @@
#define UART_RX_PACK_VECTOR0 0xF
#define UART_RX_PACK_VECTOR2 0x00
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
struct qup_regs *regs = qup[idx].regs;
@@ -43,7 +43,7 @@ void uart_tx_flush(int idx)
;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
struct qup_regs *regs = qup[idx].regs;
unsigned int reg_value;
@@ -113,7 +113,7 @@ void uart_init(int idx)
write32(&regs->geni_s_cmd0, START_UART_RX);
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
struct qup_regs *regs = qup[idx].regs;
@@ -122,7 +122,7 @@ unsigned char uart_rx_byte(int idx)
return 0;
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
struct qup_regs *regs = qup[idx].regs;
@@ -134,7 +134,7 @@ void uart_tx_byte(int idx, unsigned char data)
write32(&regs->geni_tx_fifon, data);
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
return (uintptr_t)qup[idx].regs;
}
diff --git a/src/soc/qualcomm/sc7180/uart_bitbang.c b/src/soc/qualcomm/sc7180/uart_bitbang.c
index b3a6cd5870e2..7d88a2098626 100644
--- a/src/soc/qualcomm/sc7180/uart_bitbang.c
+++ b/src/soc/qualcomm/sc7180/uart_bitbang.c
@@ -16,22 +16,22 @@ static void set_tx(int line_state)
gpio_set(UART_TX_PIN, line_state);
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
gpio_output(UART_TX_PIN, 1);
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
uart_bitbang_tx_byte(data, set_tx);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
/* unnecessary, PIO Tx means transaction is over when tx_byte returns */
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
return 0; /* not implemented */
}
diff --git a/src/soc/qualcomm/sdm845/uart_bitbang.c b/src/soc/qualcomm/sdm845/uart_bitbang.c
index b78db833a432..8d7138e5d146 100644
--- a/src/soc/qualcomm/sdm845/uart_bitbang.c
+++ b/src/soc/qualcomm/sdm845/uart_bitbang.c
@@ -10,22 +10,22 @@ static void set_tx(int line_state)
gpio_set(UART_TX_PIN, line_state);
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
gpio_output(UART_TX_PIN, 1);
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
uart_bitbang_tx_byte(data, set_tx);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
/* unnecessary, PIO Tx means transaction is over when tx_byte returns */
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
return 0; /* not implemented */
}
diff --git a/src/soc/rockchip/common/uart.c b/src/soc/rockchip/common/uart.c
index 2c6d6cec68c4..b98f182d7cea 100644
--- a/src/soc/rockchip/common/uart.c
+++ b/src/soc/rockchip/common/uart.c
@@ -9,7 +9,7 @@ unsigned int uart_platform_refclk(void)
return OSC_HZ;
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c
index 326312576b90..ef03c04f2323 100644
--- a/src/soc/samsung/exynos5250/uart.c
+++ b/src/soc/samsung/exynos5250/uart.c
@@ -100,7 +100,7 @@ static void exynos5_uart_tx_flush(struct s5p_uart *uart)
while (read32(&uart->ufstat) & 0x1ff0000);
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
if (idx < 4)
return 0x12c00000 + idx * 0x10000;
@@ -108,25 +108,25 @@ uintptr_t uart_platform_base(int idx)
return 0;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_init_dev(uart);
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
return exynos5_uart_rx_byte(uart);
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_uart_tx_byte(uart, data);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_uart_tx_flush(uart);
diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c
index c7a0649f5dcb..16a4b11da314 100644
--- a/src/soc/samsung/exynos5420/uart.c
+++ b/src/soc/samsung/exynos5420/uart.c
@@ -92,7 +92,7 @@ static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data)
write8(&uart->utxh, data);
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
if (idx < 4)
return 0x12c00000 + idx * 0x10000;
@@ -100,25 +100,25 @@ uintptr_t uart_platform_base(int idx)
return 0;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_init_dev(uart);
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
return exynos5_uart_rx_byte(uart);
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
struct s5p_uart *uart = uart_platform_baseptr(idx);
exynos5_uart_tx_byte(uart, data);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
/* Exynos5250 implements this too. */
}
diff --git a/src/soc/sifive/fu540/uart.c b/src/soc/sifive/fu540/uart.c
index c35e0f616660..353f6cd62448 100644
--- a/src/soc/sifive/fu540/uart.c
+++ b/src/soc/sifive/fu540/uart.c
@@ -6,7 +6,7 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
if (idx < 2)
return FU540_UART(idx);
diff --git a/src/soc/ti/am335x/uart.c b/src/soc/ti/am335x/uart.c
index 90095d47d900..e3648a93a6e8 100644
--- a/src/soc/ti/am335x/uart.c
+++ b/src/soc/ti/am335x/uart.c
@@ -135,7 +135,7 @@ unsigned int uart_platform_refclk(void)
return 48000000;
}
-uintptr_t uart_platform_base(int idx)
+uintptr_t uart_platform_base(unsigned int idx)
{
const unsigned int bases[] = {
0x44e09000, 0x48022000, 0x48024000,
@@ -146,7 +146,7 @@ uintptr_t uart_platform_base(int idx)
return 0;
}
-void uart_init(int idx)
+void uart_init(unsigned int idx)
{
struct am335x_uart *uart = uart_platform_baseptr(idx);
uint16_t div = (uint16_t) uart_baudrate_divisor(
@@ -154,19 +154,19 @@ void uart_init(int idx)
am335x_uart_init(uart, div);
}
-unsigned char uart_rx_byte(int idx)
+unsigned char uart_rx_byte(unsigned int idx)
{
struct am335x_uart *uart = uart_platform_baseptr(idx);
return am335x_uart_rx_byte(uart);
}
-void uart_tx_byte(int idx, unsigned char data)
+void uart_tx_byte(unsigned int idx, unsigned char data)
{
struct am335x_uart *uart = uart_platform_baseptr(idx);
am335x_uart_tx_byte(uart, data);
}
-void uart_tx_flush(int idx)
+void uart_tx_flush(unsigned int idx)
{
}