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authorKyösti Mälkki <kyosti.malkki@gmail.com>2022-03-31 07:40:10 +0300
committerArthur Heymans <arthur@aheymans.xyz>2022-05-20 07:15:39 +0000
commitfa3bc049f5ca51eeb35fafb61f043d5a54f30c14 (patch)
treee362832abc5cc3895e6bb61986111a18b240410f /src/soc
parent20a87c0bed98fe8817a2dfccf4cd271199aabc1a (diff)
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CBMEM: Change declarations for initialization hooks
There are efforts to have bootflows that do not follow a traditional bootblock-romstage-postcar-ramstage model. As part of that CBMEM initialisation hooks will need to move from romstage to bootblock. The interface towards platforms and drivers will change to use one of CBMEM_CREATION_HOOK() or CBMEM_READY_HOOK(). Former will only be called in the first stage with CBMEM available. Change-Id: Ie24bf4e818ca69f539196c3a814f3c52d4103d7e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63375 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/pm/chipset_state.c2
-rw-r--r--src/soc/amd/common/pi/heapmanager.c2
-rw-r--r--src/soc/amd/stoneyridge/romstage.c2
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c2
-rw-r--r--src/soc/intel/braswell/romstage/romstage.c2
-rw-r--r--src/soc/intel/broadwell/pch/power_state.c2
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c2
-rw-r--r--src/soc/intel/quark/storage_test.c6
-rw-r--r--src/soc/mediatek/common/memory.c2
-rw-r--r--src/soc/qualcomm/common/qclib.c4
10 files changed, 12 insertions, 14 deletions
diff --git a/src/soc/amd/common/block/pm/chipset_state.c b/src/soc/amd/common/block/pm/chipset_state.c
index 42d1a159c4a3..5dd6bd0ab70b 100644
--- a/src/soc/amd/common/block/pm/chipset_state.c
+++ b/src/soc/amd/common/block/pm/chipset_state.c
@@ -31,4 +31,4 @@ static void add_chipset_state_cbmem(int unused)
memcpy(state, &chipset_state, sizeof(*state));
}
-ROMSTAGE_CBMEM_INIT_HOOK(add_chipset_state_cbmem);
+CBMEM_CREATION_HOOK(add_chipset_state_cbmem);
diff --git a/src/soc/amd/common/pi/heapmanager.c b/src/soc/amd/common/pi/heapmanager.c
index 699bb534310b..ab923b9de8f8 100644
--- a/src/soc/amd/common/pi/heapmanager.c
+++ b/src/soc/amd/common/pi/heapmanager.c
@@ -127,7 +127,7 @@ static void ConcatenateNodes(BIOS_BUFFER_NODE *FirstNodePtr,
memset(SecondNodePtr, 0, sizeof(BIOS_BUFFER_NODE));
}
-ROMSTAGE_CBMEM_INIT_HOOK(EmptyHeap)
+CBMEM_CREATION_HOOK(EmptyHeap);
AGESA_STATUS agesa_AllocateBuffer(uint32_t Func, uintptr_t Data,
void *ConfigPtr)
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index b7731b0d8fd2..be40e2171c83 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -202,4 +202,4 @@ static void migrate_power_state(int is_recovery)
acpi_pm_gpe_add_events_print_events();
}
}
-ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state)
+CBMEM_CREATION_HOOK(migrate_power_state);
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 74238e2721ff..658da2c44b00 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -32,7 +32,7 @@ static void migrate_power_state(int is_recovery)
}
memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem));
}
-ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state)
+CBMEM_CREATION_HOOK(migrate_power_state);
static struct chipset_power_state *fill_power_state(void)
{
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index daa1b2d19fc4..a1623e13f968 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -26,7 +26,7 @@ static void migrate_power_state(int is_recovery)
}
memcpy(ps_cbmem, &power_state, sizeof(*ps_cbmem));
}
-ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state);
+CBMEM_CREATION_HOOK(migrate_power_state);
struct chipset_power_state *fill_power_state(void)
{
diff --git a/src/soc/intel/broadwell/pch/power_state.c b/src/soc/intel/broadwell/pch/power_state.c
index 12bee7d12798..b1ab622b7256 100644
--- a/src/soc/intel/broadwell/pch/power_state.c
+++ b/src/soc/intel/broadwell/pch/power_state.c
@@ -30,7 +30,7 @@ static void migrate_power_state(int is_recovery)
}
memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem));
}
-ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state)
+CBMEM_CREATION_HOOK(migrate_power_state);
/* Return 0, 3, or 5 to indicate the previous sleep state. */
static int prev_sleep_state(const struct chipset_power_state *ps)
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 0f1da7257767..bfe26c31cafd 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -85,7 +85,7 @@ static void migrate_power_state(int is_recovery)
}
memcpy(ps_cbmem, &power_state, sizeof(*ps_cbmem));
}
-ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state)
+CBMEM_CREATION_HOOK(migrate_power_state);
static void print_num_status_bits(int num_bits, uint32_t status,
const char *const bit_names[])
diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c
index 04c673616d51..f15d295a6101 100644
--- a/src/soc/intel/quark/storage_test.c
+++ b/src/soc/intel/quark/storage_test.c
@@ -159,7 +159,7 @@ void storage_test(uint32_t bar, int full_initialization)
/* Get the structure addresses */
media = NULL;
- if (ENV_ROMSTAGE)
+ if (ENV_CREATES_CBMEM)
media = (struct storage_media *)drivers_storage;
else
media = cbmem_find(CBMEM_ID_STORAGE_DATA);
@@ -225,7 +225,6 @@ void storage_test(uint32_t bar, int full_initialization)
}
#endif
-#if ENV_ROMSTAGE
static void copy_storage_structures(int is_recovery)
{
struct storage_media *media;
@@ -242,5 +241,4 @@ static void copy_storage_structures(int is_recovery)
media->ctrlr = &sdhci_ctrlr->sd_mmc_ctrlr;
}
-ROMSTAGE_CBMEM_INIT_HOOK(copy_storage_structures);
-#endif
+CBMEM_CREATION_HOOK(copy_storage_structures);
diff --git a/src/soc/mediatek/common/memory.c b/src/soc/mediatek/common/memory.c
index ab1ccb5044a6..1771313ac047 100644
--- a/src/soc/mediatek/common/memory.c
+++ b/src/soc/mediatek/common/memory.c
@@ -146,7 +146,7 @@ static void add_mem_chip_info(int unused)
fill_dram_info(mc, curr_ddr_info);
}
-ROMSTAGE_CBMEM_INIT_HOOK(add_mem_chip_info);
+CBMEM_CREATION_HOOK(add_mem_chip_info);
static int run_dram_blob(struct dramc_param *dparam)
{
diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c
index b6d04b1d0d60..2829cb4a98a6 100644
--- a/src/soc/qualcomm/common/qclib.c
+++ b/src/soc/qualcomm/common/qclib.c
@@ -19,7 +19,7 @@
#define QCLIB_VERSION 0
-/* store QcLib return data until ROMSTAGE_CBMEM_INIT_HOOK runs */
+/* store QcLib return data until CBMEM_CREATION_HOOK runs */
static void *mem_chip_addr;
static void write_mem_chip_information(struct qclib_cb_if_table_entry *te)
@@ -51,7 +51,7 @@ static void add_mem_chip_info(int unused)
memcpy(mem_region_base, mem_chip_addr, size);
}
-ROMSTAGE_CBMEM_INIT_HOOK(add_mem_chip_info);
+CBMEM_CREATION_HOOK(add_mem_chip_info);
struct qclib_cb_if_table qclib_cb_if_table = {
.magic = QCLIB_MAGIC_NUMBER,