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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-09 14:54:06 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-20 19:04:29 +0100 |
| commit | 1b1b795f97d2aaa2c6104f164ed2b4e792895019 (patch) | |
| tree | de432766bc842e64bfa025cec2e7044917e75fa0 /src/southbridge/amd/agesa/hudson/amd_pci_int_types.h | |
| parent | e8b4da2f6f8b6fc38db82b1a2e1b9b9340ecfc53 (diff) | |
| download | coreboot-1b1b795f97d2aaa2c6104f164ed2b4e792895019.tar.gz coreboot-1b1b795f97d2aaa2c6104f164ed2b4e792895019.tar.bz2 coreboot-1b1b795f97d2aaa2c6104f164ed2b4e792895019.zip | |
AGESA: Remove redundant Avalon support from Hudson
Avalon support now lives under pi/avalon so we can restore Hudson
to the state before it was added there.
Change-Id: Id96973f3458fae162232c160e602595b58c43027
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7389
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/amd_pci_int_types.h')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/amd_pci_int_types.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h b/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h index 7788ed10b403..75efd6719257 100644 --- a/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h +++ b/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h @@ -39,16 +39,6 @@ const char * intr_types[] = { [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", [0x40] = "RSVD\t", "SATA\t", }; -#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) -const char * intr_types[] = { - [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t", - [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD", - [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", "SD\t", - [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t", - [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", - [0x40] = "RSVD\t", "SATA\t", - [0x60] = "RSVD\t", "RSVD\t", "GPIO\t", -}; #endif #endif /* AMD_PCI_INT_TYPES_H */ |