diff options
| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-14 16:35:34 -0500 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-17 04:42:44 +0200 |
| commit | 288c95882d701bb09c77c8ad1a8904673503656c (patch) | |
| tree | cb3e8e448e1de1cec866ff0299a95c14042100a4 /src/southbridge/amd/agesa/hudson/smihandler.c | |
| parent | 22d90e34f95307d143249b53f3bb48f0a674ecbd (diff) | |
| download | coreboot-288c95882d701bb09c77c8ad1a8904673503656c.tar.gz coreboot-288c95882d701bb09c77c8ad1a8904673503656c.tar.bz2 coreboot-288c95882d701bb09c77c8ad1a8904673503656c.zip | |
southbridge/hudson: Add support for ACPI enable/disable via SMI
This enables the ACPI SMI command port in the FADT table, and sets up
the hardware accordingly. If we have SMI enabled, then we don't set
the SCI_EN bit at boot, causing the OS to send the ACPI_ENABLE
command, as required by the ACPI spec. This gives us a chance to hook
into the mainboard_smi_apmc() handler.
Change-Id: Ib4c63d55b3132578dcae48bfe2092d4ea35821dd
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5511
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/smihandler.c')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/smihandler.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/smihandler.c b/src/southbridge/amd/agesa/hudson/smihandler.c index 923fd93bf060..e762d0bb9607 100644 --- a/src/southbridge/amd/agesa/hudson/smihandler.c +++ b/src/southbridge/amd/agesa/hudson/smihandler.c @@ -5,12 +5,14 @@ * Subject to the GNU GPL v2, or (at your option) any later version. */ +#include "hudson.h" #include "smi.h" #include <console/console.h> #include <cpu/x86/smm.h> #include <delay.h> +#define SMI_0x88_ACPI_COMMAND (1 << 11) enum smi_source { SMI_SOURCE_SCI = (1 << 0), @@ -21,6 +23,28 @@ enum smi_source { SMI_SOURCE_0x90 = (1 << 5) }; +static void hudson_apmc_smi_handler(void) +{ + u32 reg32; + const uint8_t cmd = inb(ACPI_SMI_CTL_PORT); + + switch (cmd) { + case ACPI_SMI_CMD_ENABLE: + reg32 = inl(ACPI_PM1_CNT_BLK); + reg32 |= (1 << 0); /* SCI_EN */ + outl(reg32, ACPI_PM1_CNT_BLK); + break; + case ACPI_SMI_CMD_DISABLE: + reg32 = inl(ACPI_PM1_CNT_BLK); + reg32 &= ~(1 << 0); /* clear SCI_EN */ + outl(ACPI_PM1_CNT_BLK, reg32); + break; + } + + if (mainboard_smi_apmc) + mainboard_smi_apmc(cmd); +} + int southbridge_io_trap_handler(int smif) { return 0; @@ -62,6 +86,10 @@ static void process_smi_0x88(void) { const uint32_t status = smi_read32(0x88); + if (status & SMI_0x88_ACPI_COMMAND) { + /* Command received via ACPI SMI command port */ + hudson_apmc_smi_handler(); + } /* Clear events to prevent re-entering SMI if event isn't handled */ smi_write32(0x88, status); } |