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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-26 20:47:47 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-06-04 11:19:01 +0200 |
| commit | d0e212cdce76b42090325f429e7bd78e0b1a9bb5 (patch) | |
| tree | e4f423a12bcce87ce93f79874df83f517312fbb6 /src/southbridge/amd/amd8111/lpc.c | |
| parent | 6ccf119932661eaf63af0ee3a276a6d2f2f27b89 (diff) | |
| download | coreboot-d0e212cdce76b42090325f429e7bd78e0b1a9bb5.tar.gz coreboot-d0e212cdce76b42090325f429e7bd78e0b1a9bb5.tar.bz2 coreboot-d0e212cdce76b42090325f429e7bd78e0b1a9bb5.zip | |
devicetree: Discriminate device ops scan_bus()
Use of scan_static_bus() and tree traversals is somewhat convoluted.
Start cleaning this up by assigning each path type with separate
static scan_bus() function.
For ME, SMBus and LPC paths a bus cannot expose bridges, as those would
add to the number of encountered PCI buses.
Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8534
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/southbridge/amd/amd8111/lpc.c')
| -rw-r--r-- | src/southbridge/amd/amd8111/lpc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c index 2ded0cb2ff63..47b9ae7bb694 100644 --- a/src/southbridge/amd/amd8111/lpc.c +++ b/src/southbridge/amd/amd8111/lpc.c @@ -151,7 +151,7 @@ static struct device_operations lpc_ops = { .write_acpi_tables = acpi_write_hpet, .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, #endif - .scan_bus = scan_static_bus, + .scan_bus = scan_lpc_bus, .enable = amd8111_enable, .ops_pci = &lops_pci, }; |