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| author | zbao <fishbaozi@gmail.com> | 2012-08-03 16:58:53 +0800 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2012-08-05 07:01:26 +0200 |
| commit | 366f0fc30a6b0439cfa2867b3d435975512bd9b8 (patch) | |
| tree | cd2bd91a5648b3aef503014e4c46c9f95aa04da1 /src/southbridge/amd/cimx/sb900/late.c | |
| parent | cc3b18843f5db9ccdb2c8cd609897e2560f47a92 (diff) | |
| download | coreboot-366f0fc30a6b0439cfa2867b3d435975512bd9b8.tar.gz coreboot-366f0fc30a6b0439cfa2867b3d435975512bd9b8.tar.bz2 coreboot-366f0fc30a6b0439cfa2867b3d435975512bd9b8.zip | |
AMD SB: Call the rtc update if needed (Propagation)
Apply the change
http://review.coreboot.org/1390
to all the AMD southbridge.
Change-Id: I8e94014f8883a0408b68355d9aa33aea4373881f
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1406
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb900/late.c')
| -rw-r--r-- | src/southbridge/amd/cimx/sb900/late.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c index 71c65e31c64d..85485edfb6e1 100644 --- a/src/southbridge/amd/cimx/sb900/late.c +++ b/src/southbridge/amd/cimx/sb900/late.c @@ -22,6 +22,7 @@ #include <device/pci.h> /* device_operations */ #include <device/pci_ids.h> #include <device/smbus.h> /* smbus_bus_operations */ +#include <pc80/mc146818rtc.h> #include <console/console.h> /* printk */ #include "lpc.h" /* lpc_read_resources */ #include "SbPlatform.h" /* Platfrom Specific Definitions */ @@ -98,6 +99,8 @@ static void lpc_init(device_t dev) printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - Start.\n"); /* SB Configure HPET base and enable bit */ //- hpetInit(sb_config, &(sb_config->BuildParameters)); + rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY); + printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - End.\n"); } |