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author | Elyes Haouas <ehaouas@noos.fr> | 2022-02-11 22:32:44 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-22 21:13:43 +0000 |
commit | 2a6cc959eeeacbecd6bc3370115ab99bb6e886d6 (patch) | |
tree | 71c0121e0de4447c728a626a36283581435e5468 /src/southbridge/amd/pi | |
parent | f0d4f930a0ab1f54ee03d282fe37c7be4e9a61f9 (diff) | |
download | coreboot-2a6cc959eeeacbecd6bc3370115ab99bb6e886d6.tar.gz coreboot-2a6cc959eeeacbecd6bc3370115ab99bb6e886d6.tar.bz2 coreboot-2a6cc959eeeacbecd6bc3370115ab99bb6e886d6.zip |
southbridge/amd/*/*/smbus.c: Reformat code and reduce difference
Change-Id: I43644b757a5a85864162da6a35f7f2a5335f8007
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/amd/pi')
-rw-r--r-- | src/southbridge/amd/pi/hudson/smbus.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/src/southbridge/amd/pi/hudson/smbus.c b/src/southbridge/amd/pi/hudson/smbus.c index c418492731bd..43f8ca75d322 100644 --- a/src/southbridge/amd/pi/hudson/smbus.c +++ b/src/southbridge/amd/pi/hudson/smbus.c @@ -10,6 +10,7 @@ static int smbus_wait_until_ready(u32 smbus_io_base) { u32 loops; + loops = SMBUS_TIMEOUT; do { u8 val; @@ -20,12 +21,14 @@ static int smbus_wait_until_ready(u32 smbus_io_base) } outb(val, smbus_io_base + SMBHSTSTAT); } while (--loops); + return -2; /* time out */ } static int smbus_wait_until_done(u32 smbus_io_base) { u32 loops; + loops = SMBUS_TIMEOUT; do { u8 val; @@ -40,6 +43,7 @@ static int smbus_wait_until_done(u32 smbus_io_base) return 0; } } while (--loops); + return -3; /* timeout */ } @@ -97,8 +101,7 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val) return 0; } -int do_smbus_read_byte(u32 smbus_io_base, u32 device, - u32 address) +int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address) { u8 byte; @@ -128,8 +131,7 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, return byte; } -int do_smbus_write_byte(u32 smbus_io_base, u32 device, - u32 address, u8 val) +int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val) { u8 byte; @@ -159,8 +161,7 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, return 0; } -void alink_ab_indx(u32 reg_space, u32 reg_addr, - u32 mask, u32 val) +void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val) { u32 tmp; @@ -181,8 +182,7 @@ void alink_ab_indx(u32 reg_space, u32 reg_addr, outl(0, AB_INDX); } -void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, - u32 mask, u32 val) +void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val) { u32 tmp; @@ -206,8 +206,7 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, /* space = 0: AX_INDXC, AX_DATAC * space = 1: AX_INDXP, AX_DATAP */ -void alink_ax_indx(u32 space /*c or p? */, u32 axindc, - u32 mask, u32 val) +void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val) { u32 tmp; |