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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-05-26 15:42:59 +0300 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-28 14:53:32 +0000 |
commit | 8b894242e727539ed40436d20bd87a097d371845 (patch) | |
tree | 96c8a515b8dbc26aeaa54fc38d175343950ecc51 /src/southbridge/amd/pi | |
parent | 933a44b80d3b414282fe0c7b060cb7fd0dc6cf90 (diff) | |
download | coreboot-8b894242e727539ed40436d20bd87a097d371845.tar.gz coreboot-8b894242e727539ed40436d20bd87a097d371845.tar.bz2 coreboot-8b894242e727539ed40436d20bd87a097d371845.zip |
soc,sb/amd: Change SPI controller resource
This replaces IORESOURCE_SUBTRACTIVE with IORESOURCE_RESERVE.
Change-Id: Ib3d934ca704273daacbeb3c52412bf04e2be7217
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64695
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/pi')
-rw-r--r-- | src/southbridge/amd/pi/hudson/lpc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c index e672ecef6001..9febc16f7bf8 100644 --- a/src/southbridge/amd/pi/hudson/lpc.c +++ b/src/southbridge/amd/pi/hudson/lpc.c @@ -103,7 +103,7 @@ static void hudson_lpc_read_resources(struct device *dev) IORESOURCE_ASSIGNED | IORESOURCE_FIXED; /* Add a memory resource for the SPI BAR. */ - fixed_mem_resource_kb(dev, 2, SPI_BASE_ADDRESS / 1024, 1, IORESOURCE_SUBTRACTIVE); + mmio_range(dev, 2, SPI_BASE_ADDRESS, 1 * KiB); res = new_resource(dev, 3); /* IOAPIC */ res->base = IO_APIC_ADDR; |