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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-15 19:57:44 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-09 11:16:28 +0000 |
| commit | d35c06d09ee79eb76ec491431b3df4149100ad52 (patch) | |
| tree | 2546910ccbf537aa152954c0a3f2113004dc64f7 /src/southbridge/amd/sb700/lpc.c | |
| parent | b617e32bb99af608b7609583815e876d348025ac (diff) | |
| download | coreboot-d35c06d09ee79eb76ec491431b3df4149100ad52.tar.gz coreboot-d35c06d09ee79eb76ec491431b3df4149100ad52.tar.bz2 coreboot-d35c06d09ee79eb76ec491431b3df4149100ad52.zip | |
sb/amd: Support CBMEM_TOP_BACKUP
Change-Id: I8d2005e4f2aa5a3b46e30f52556ee66aeb3d10cc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21154
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/amd/sb700/lpc.c')
| -rw-r--r-- | src/southbridge/amd/sb700/lpc.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 8ee0395ccdfe..2943b96a949f 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -82,25 +82,6 @@ static void lpc_init(device_t dev) setup_i8254(); /* Initialize i8254 timers */ } -#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) -int acpi_get_sleep_type(void) -{ - u16 tmp = inw(ACPI_PM1_CNT_BLK); - return ((tmp & (7 << 10)) >> 10); -} - -void backup_top_of_low_cacheable(uintptr_t ramtop) -{ - u32 dword = (u32) ramtop; - int nvram_pos = 0xfc, i; - for (i = 0; i < 4; i++) { - outb(nvram_pos, BIOSRAM_INDEX); - outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA); - nvram_pos++; - } -} -#endif - static void sb700_lpc_read_resources(device_t dev) { struct resource *res; |