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authorElyes Haouas <ehaouas@noos.fr>2022-10-11 13:45:44 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-12 14:18:15 +0000
commit85f87e823f6c27bb9ad7811cf669173806237e0c (patch)
tree27486714c9ea3109833d89808ddee238fdc2c8b1 /src/southbridge/amd
parentc929f0933f5f4bbb15573a1bb64c799cd1fc3a02 (diff)
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treewide: Use 'pm2_cnt_len' for 'x_pm2_cnt_blk.bit_width'
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I040ddab8845cc2191c6ca5af7f132ec8a504bccf Reviewed-on: https://review.coreboot.org/c/coreboot/+/68274 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/cimx/sb800/fadt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c
index cf566faf9509..bba36ca41504 100644
--- a/src/southbridge/amd/cimx/sb800/fadt.c
+++ b/src/southbridge/amd/cimx/sb800/fadt.c
@@ -103,7 +103,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
- fadt->x_pm2_cnt_blk.bit_width = 8; /* Hudson 1 Pm2Control is 8 bits */
+ fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
fadt->x_pm2_cnt_blk.bit_offset = 0;
fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK_ADDRESS;