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authorVladimir Serbinenko <phcoder@gmail.com>2014-09-05 01:01:31 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-09-13 00:42:14 +0200
commit75c83870e51e6bc48a83114c64177432d3204b1f (patch)
tree98284c8843dc1a27a2df4e46b493386934d51a32 /src/southbridge/intel/bd82x6x/Makefile.inc
parenta812643723419f4fe3f079731a9d10d2dc083aae (diff)
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azalia: Shrink boilerplate
Change-Id: Ib3e09644c0ee71aacb067adaa85653d151b52078 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6840 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index def9cd2aa297..b79b85a0a93a 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -34,6 +34,8 @@ ramstage-y += me.c
ramstage-y += me_8.x.c
ramstage-y += smbus.c
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
+
ramstage-y += me_status.c
ramstage-y += reset.c
ramstage-y += watchdog.c