diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-20 01:22:20 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-10 07:29:14 +0000 |
| commit | d9e58dca9e72ca2efa62eab832aad606c9c58fcd (patch) | |
| tree | 565e2a763d0e70c2efcc0ce744599829679a275c /src/southbridge/intel/bd82x6x/early_rcba.c | |
| parent | a2a9e607b1e92f322da25d0ca23ce565eb2b17d7 (diff) | |
| download | coreboot-d9e58dca9e72ca2efa62eab832aad606c9c58fcd.tar.gz coreboot-d9e58dca9e72ca2efa62eab832aad606c9c58fcd.tar.bz2 coreboot-d9e58dca9e72ca2efa62eab832aad606c9c58fcd.zip | |
nb/intel/sandybridge: Use common {DMI,EP,MCH}BAR accessors
Drop unused sandybridge.h includes to avoid build failures on Ironlake.
Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 remains identical.
Change-Id: If2f0147fe50266e2fe2098cafdf004e51282f5e2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49752
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_rcba.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_rcba.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c index 29df6a38cbc7..49c137aec13f 100644 --- a/src/southbridge/intel/bd82x6x/early_rcba.c +++ b/src/southbridge/intel/bd82x6x/early_rcba.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <northbridge/intel/sandybridge/sandybridge.h> #include "pch.h" void southbridge_configure_default_intmap(void) |