summaryrefslogtreecommitdiffstats
path: root/src/southbridge/intel/bd82x6x/lpc.c
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2017-09-15 15:19:32 -0600
committerAaron Durbin <adurbin@chromium.org>2017-09-20 23:54:26 +0000
commit976200388b6924c7b30c6062b64a8db7e215f37f (patch)
tree659eca8c9acac2ffb13492086acca2b60ec099a7 /src/southbridge/intel/bd82x6x/lpc.c
parentcfe7ad1e8f7ed6f3d72db2041bf2051ac88e2a5f (diff)
downloadcoreboot-976200388b6924c7b30c6062b64a8db7e215f37f.tar.gz
coreboot-976200388b6924c7b30c6062b64a8db7e215f37f.tar.bz2
coreboot-976200388b6924c7b30c6062b64a8db7e215f37f.zip
southbridge/intel/bd82x6x: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot paths move the rtc failure calculation to early_pch_common.c and add a helper function to determine if failure occurred. BUG=b:63054105 Change-Id: I710d99551cfb6455244f66b47fcbecc790ae770f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21558 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/lpc.c')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c14
1 files changed, 5 insertions, 9 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 3f722192e585..2bfc1e3374e7 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -277,18 +277,14 @@ static void pch_power_options(device_t dev)
static void pch_rtc_init(struct device *dev)
{
- u8 reg8;
- int rtc_failed;
+ int rtc_failed = rtc_failure();
- reg8 = pci_read_config8(dev, GEN_PMCON_3);
- rtc_failed = reg8 & RTC_BATTERY_DEAD;
if (rtc_failed) {
- reg8 &= ~RTC_BATTERY_DEAD;
- pci_write_config8(dev, GEN_PMCON_3, reg8);
-#if IS_ENABLED(CONFIG_ELOG)
- elog_add_event(ELOG_TYPE_RTC_RESET);
-#endif
+ if (IS_ENABLED(CONFIG_ELOG))
+ elog_add_event(ELOG_TYPE_RTC_RESET);
+ pci_update_config8(dev, GEN_PMCON_3, ~RTC_BATTERY_DEAD, 0);
}
+
printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
cmos_init(rtc_failed);