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| author | Furquan Shaikh <furquan@google.com> | 2021-10-01 15:18:09 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2021-10-19 16:08:58 +0000 |
| commit | 3959aa63518ed2a3fa6b62b82a9f6daf75dd38d8 (patch) | |
| tree | 84c2729c1472029f9c1e73dc91173253f8d442ab /src/southbridge/intel/common/firmware/Makefile.inc | |
| parent | 555f0407721ca1c29e3d6f3a6f4076fdcb550915 (diff) | |
| download | coreboot-3959aa63518ed2a3fa6b62b82a9f6daf75dd38d8.tar.gz coreboot-3959aa63518ed2a3fa6b62b82a9f6daf75dd38d8.tar.bz2 coreboot-3959aa63518ed2a3fa6b62b82a9f6daf75dd38d8.zip | |
southbridge/intel/common: Add an option to allow stitching of CSE binary
In the following changes, CSE binary for some platforms will be
stitched at build time instead of adding a pre-built binary. This
change adds a new Kconfig `STITCH_ME_BIN` which allows mainboard to
select if it wants to stitch CSE binary instead of adding a pre-built
one. In this case, ME_BIN_PATH is not visible to user and instead
mainboard and/or SoC code is expected to provide the recipe for
stitching the CSE image.
BUG=b:189177580
Change-Id: I78ab377e110610f9ef4d86a2b6eeb4113897df85
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/southbridge/intel/common/firmware/Makefile.inc')
| -rw-r--r-- | src/southbridge/intel/common/firmware/Makefile.inc | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc index d5a48fd6f974..693bafb7a85e 100644 --- a/src/southbridge/intel/common/firmware/Makefile.inc +++ b/src/southbridge/intel/common/firmware/Makefile.inc @@ -25,7 +25,18 @@ endif add_intel_firmware: $(call strip_quotes,$(CONFIG_IFD_BIN_PATH)) ifeq ($(CONFIG_HAVE_ME_BIN),y) -add_intel_firmware: $(call strip_quotes,$(CONFIG_ME_BIN_PATH)) + +OBJ_ME_BIN := $(obj)/me.bin + +ifneq ($(CONFIG_STITCH_ME_BIN),y) + +$(OBJ_ME_BIN): $(call strip_quotes,$(CONFIG_ME_BIN_PATH)) + cp $< $@ + +endif + +add_intel_firmware: $(OBJ_ME_BIN) + endif ifeq ($(CONFIG_HAVE_GBE_BIN),y) add_intel_firmware: $(call strip_quotes,$(CONFIG_GBE_BIN_PATH)) @@ -46,7 +57,7 @@ ifeq ($(CONFIG_HAVE_ME_BIN),y) printf " IFDTOOL me.bin -> coreboot.pre\n" $(objutil)/ifdtool/ifdtool \ $(IFDTOOL_USE_CHIPSET) \ - -i ME:$(CONFIG_ME_BIN_PATH) \ + -i ME:$(OBJ_ME_BIN) \ -O $(obj)/coreboot.pre \ $(obj)/coreboot.pre endif |